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参数资料
| 型号： | S29CL032J0JFFM020 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80 |
| 封装： | 13 X 11 MM, 1 MM PITCH, LEAD FREE, FORTIFIED, BGA-80 |
| 文件页数： | 62/79页 |
| 文件大小： | 2994K |
| 代理商： | S29CL032J0JFFM020 |
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March 30, 2009 S29CD-J_CL-J_00_B3
S29CD-J & S29CL-J Flash Family
65
Data
She e t
Figure 18.13 DQ2 vs. DQ6 for Erase/Erase Suspend Operations
Note
The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector.
Figure 18.14 Synchronous Data Polling Timing/Toggle Bit Timings
Notes
1. The timings are similar to synchronous read timings and asynchronous data polling Timings/Toggle bit Timing.
2. VA = Valid Address. Two read cycles are required to determine status. When the Embedded Algorithm operation is complete, the toggle bits will stop toggling.
3. RDY is active with data (A18 = 0 in the Configuration Register). When A18 = 1 in the Configuration Register, RDY is active one clock cycle before data.
4. Data polling requires burst access time delay.
WE#
DQ6
DQ2
Enter Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
Erase
Resume
Erase
Erase Suspend
Read
Erase Suspend
Program
Erase Suspend
Read
EraseErase
Complete
CE#
CLK
ADV#
Addresses
OE#
Data
RDY
Status Data
VA
tOE
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