参数资料
型号: S29GL032A11BFIR43
厂商: SPANSION LLC
元件分类: PROM
英文描述: 64 MEGABIT 32MEGABIT 3.0 BOLT ONLY PAGE MODE FLASH MEMORY
中文描述: 2M X 16 FLASH 3V PROM, 110 ns, PBGA48
封装: 8.15 X 6.15 MM, LEAD FREE, FBGA-48
文件页数: 59/95页
文件大小: 3585K
代理商: S29GL032A11BFIR43
62
S29GL-A
S29GL-A_00_A12 May 21, 2008
Da ta
Sh e e t
Table 10.1 Command Definitions (x8 Mode, BYTE# = VIL)
Command Sequence
Cyc
le
s
Bus Cycles (Notes 2–5)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
1RA
RD
Reset (Note 7)
1XXX
F0
A
u
toselect
Manufacturer ID
4
AAA
AA
555
55
AAA
90
X00
01
Device ID (Note 9)
6
AAA
AA
555
55
AAA
90
X02
7E
X1C
X1E
Device ID (Note 1)
4
AAA
AA
555
55
AAA
90
X02
Secured Silicon Sector Factory Protect
4
AAA
AA
555
55
AAA
90
X06
Sector Group Protect Verify
4
AAA
AA
555
55
AAA
90
(SA)X04
00/01
Enter Secured Silicon Sector Region
3
AAA
AA
555
55
AAA
88
Exit Secured Silicon Sector Region
4
AAA
AA
555
55
AAA
90
XXX
00
Write to Buffer (Note 4)
3
AAA
AA
555
55
SA
25
SA
BC
PA
PD
WBL
PD
Program Buffer to Flash
1
SA
29
Write to Buffer Abort Reset (Note 5)
3
AAA
AA
555
55
AAA
F0
Chip Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
AAA
10
Sector Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
SA
30
Program/Erase Suspend (Note 6)
1
XXX
B0
Program/Erase Resume (Note 7)
1XXX
30
CFI Query (Note 8)
1AA
98
Legend
X = Don’t care
RA = Read Address of memory location to be read.
RD = Read Data read from location RA during read operation.
PA = Program Address. Addresses latch on falling edge of WE# or CE# pulse,
whichever happens later.
PD = Program Data for location PA. Data latches on rising edge of WE# or CE#
pulse, whichever happens first.
SA = Sector Address of sector to be verified (in autoselect mode) or erased.
Address bits A21–A15 uniquely select any sector.
WBL = Write Buffer Location. Address must be within same write buffer page as
PA.
BC = Byte Count. Number of write buffer locations to load minus 1.
Notes
1. See Table 7.1 on page 22 for description of bus operations.
2. All values are in hexadecimal.
3. Shaded cells indicate read cycles. All others are write cycles.
4. During unlock and command cycles, when lower address bits are 555 or
AAA as shown in table, address bits above A11 are don’t care.
5. Unless otherwise noted, address bits A21–A11 are don’t cares.
6. No unlock or command cycles required when device is in read mode.
7. Reset command is required to return to read mode (or to erase-suspend-
read mode if previously in Erase Suspend) when device is in autoselect
mode, or if DQ5 goes high while device is providing status information.
8. Fourth cycle of autoselect command sequence is a read cycle. Data bits
DQ15–DQ8 are don’t care. See Autoselect Command Sequence on page 53
or more information.
9. For S29GL064A and S29GL032A Device ID must be read in three cycles.
1. For S29GL016A, Device ID must be read in one cycle.
2. Refer to Table 7.12 on page 40, for data indicating Secured Silicon Sector
factory protect status.
3. Data is 00h for an unprotected sector group and 01h for a protected sector
group.
4. Total number of cycles in command sequence is determined by number of
bytes written to write buffer. Maximum number of cycles in command
sequence is 37, including Program Buffer to Flash command.
5. Command sequence resets device for next command after aborted write-to-
buffer operation.
6. System may read and program in non-erasing sectors, or enter autoselect
mode, when in Erase Suspend mode. Erase Suspend command is valid only
during a sector erase operation.
7. Erase Resume command is valid only during Erase Suspend mode.
8. Command is valid when device is ready to read array data or when device is
in autoselect mode.
9. Refer to Table 7.12 on page 40, for individual Device IDs per device density
and model number.
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