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| 型号： | S29WS128N0LBFI011 |
| 厂商： | Spansion Inc. |
| 英文描述： | 256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
| 中文描述： | 256/128/64兆位的CMOS 1.8伏只有同时读/写突发模式闪存 |
| 文件页数： | 42/99页 |
| 文件大小： | 1091K |
| 代理商： | S29WS128N0LBFI011 |
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January 25, 2005 S29WS-N_00_G0
45
Ad vance
Information
Table 7.23. DQ6 and DQ2 Indications
Reading Toggle Bits DQ6/DQ2.
Whenever the system initially begins reading toggle bit status,
it must read DQ7–DQ0 at least twice in a row to determine whether a toggle bit is toggling. Typ-
ically, the system would note and store the value of the toggle bit after the first read. After the
second read, the system would compare the new value of the toggle bit with the first. If the toggle
bit is not toggling, the device has completed the program or erases operation. The system can
read array data on DQ7–DQ0 on the following read cycle. However, if after the initial two read
cycles, the system determines that the toggle bit is still toggling, the system also should note
whether the value of DQ5 is high (see the section on DQ5). If it is, the system should then deter-
mine again whether the toggle bit is toggling, since the toggle bit may have stopped toggling just
as DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed
the program or erases operation. If it is still toggling, the device did not complete the operation
successfully, and the system must write the reset command to return to reading array data. The
remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5
has not gone high. The system may continue to monitor the toggle bit and DQ5 through succes-
sive read cycles, determining the status as described in the previous paragraph. Alternatively, it
may choose to perform other system tasks. In this case, the system must start at the beginning
of the algorithm when it returns to determine the status of the operation. Refer to Figure 7.6 for
more details.
DQ5: Exceeded Timing Limits.
DQ5 indicates whether the program or erase time has exceeded
a specified internal pulse count limit. Under these conditions DQ5 produces a “1,” indicating that
the program or erase cycle was not successfully completed. The device may output a “1” on DQ5
if the system tries to program a “1” to a location that was previously programmed to “0.” Only an
erase operation can change a “0” back to a “1.” Under this condition, the device halts the opera-
tion, and when the timing limit has been exceeded, DQ5 produces a “1.”Under both these
conditions, the system must write the reset command to return to the read mode (or to the erase-
suspend-read mode if a bank was previously in the erase-suspend-program mode).
DQ3: Sector Erase Timeout State Indicator.
After writing a sector erase command sequence,
the system may read DQ3 to determine whether or not erasure has begun. (The sector erase
timer does not apply to the chip erase command.) If additional sectors are selected for erasure,
the entire time-out also applies after each additional sector erase command. When the time-out
period is complete, DQ3 switches from a “0” to a “1.” If the time between additional sector erase
commands from the system can be assumed to be less than tSEA, the system need not monitor
DQ3. See Sector Erase Command Sequence for more details.
After the sector erase command is written, the system should read the status of DQ7 (Data# Poll-
ing) or DQ6 (Toggle Bit I) to ensure that the device has accepted the command sequence, and
If device is
and the system reads
then DQ6
and DQ2
programming,
at any address,
toggles,
does not toggle.
actively erasing,
at an address within a sector
selected for erasure,
toggles,
also toggles.
at an address within sectors not
selected for erasure,
toggles,
does not toggle.
erase suspended,
at an address within a sector
selected for erasure,
does not toggle,
toggles.
at an address within sectors not
selected for erasure,
returns array data,
returns array data. The system can
read from any sector not selected for
erasure.
programming in
erase suspend
at any address,
toggles,
is not applicable.
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| S29WS128N0LBFI012 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:256/128/64 MEGABIT CMOS 1.8 VOLT ONLY SIMULTANEOUS READ/WRITE BURST MODE FLASH MEMORY |
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