xiv
S3C825A/P825A MICROCONTROLLER
List of Figures (Concluded)
Page
Title
Page
Number
17-1
Serial I/O Module Control Register (SIOCON) ....................................................... 17-2
17-2
SIO Prescaler Register (SIOPS) ............................................................................ 17-3
17-3
SIO Functional Block Diagram............................................................................... 17-3
17-4
Serial I/O Timing in Transmit/Receive Mode (Tx at falling, SIOCON.4 = 0) ........... 17-4
17-5
Serial I/O Timing in Transmit/Receive Mode (Tx at rising, SIOCON.4 = 1) ............ 17-4
18-1
UART Control Register (UARTCON) ..................................................................... 18-2
18-2
UART Interrupt Pending Bits (INTPND.5–.4).......................................................... 18-3
18-3
UART Data Register (UDATA)............................................................................... 18-4
18-4
UART Baud Rate Data Register (BRDATA) ........................................................... 18-4
18-5
UART Functional Block Diagram ........................................................................... 18-6
18-6
Timing Diagram for Serial Port Mode 0 Operation ................................................. 18-7
18-7
Timing Diagram for Serial Port Mode 1 Operation ................................................. 18-8
18-8
Timing Diagram for Serial Port Mode 2 Operation ................................................. 18-9
18-9
Timing Diagram for Serial Port Mode 3 Operation ................................................. 18-10
18-10
Connection Example for Multiprocessor Serial Data Communications ................... 18-12
19-1
Input Timing for External Interrupts (P2.4–P2.7, P4).............................................. 19-5
19-2
Input Timing for
RESET ........................................................................................ 19-5
19-3
Stop Mode Release Timing Initiated by
RESET..................................................... 19-6
19-4
Stop Mode Release Timing Initiated by Interrupts .................................................. 19-7
19-5
Serial Data Transfer Timing................................................................................... 19-9
19-6
Clock Timing Measurement at X
IN ......................................................................... 19-11
19-7
Clock Timing Measurement at XT
IN ....................................................................... 19-11
19-8
Operating Voltage Range ...................................................................................... 19-12
19-9
Waveform for UART Timing Characteristics .......................................................... 19-13
19-10
A.C. Timing Waveform for the UART Module ........................................................ 19-14
20-1
Package Dimensions (80-QFP-1420C) .................................................................. 20-1
20-2
Package Dimension (80-TQFP-1212) .................................................................... 20-2
21-1
S3P825A Pin Assignments (80-Pin TQFP Package).............................................. 21-2
21-2
S3P825A Pin Assignments (80-Pin QFP Package) ................................................ 21-3
21-3
Operating Voltage Range ...................................................................................... 21-5
22-1
SMDS Product Configuration (SMDS2+) ............................................................... 22-2
22-2
TB825A Target Board Configuration ...................................................................... 22-3
22-3
40-Pin Connectors (J101, J102) for TB825A.......................................................... 22-5
22-4
S3C825A Cables for 80-TQFP Package ................................................................ 22-6