参数资料
型号: S3P9664-SK
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO20
封装: 0.300 INCH, SOP-20
文件页数: 143/148页
文件大小: 784K
代理商: S3P9664-SK
BASIC TIMER and TIMER 0
S3C9664/P9664 (Preliminary Spec)
10-10
Pulse Width Modulation Mode
The PWM cycle width (time) is determined the timer 0 input clock. One cycle is equal to t
CLK × 2
8 (for the 8-bit
counter). The timer 0 data register value determines the pulse modulation width. (The minimum value is Low
level and the maximum value is High level.) A match signal generates the timer 0 interrupt (T0_INT), but it does
not clear the timer 0 counter value.
Data Register
(T0DATA)
Comparator
CTL
T0CON
High level when
data > counter;
Low level when
data < counter
PND
Interrupt
Enable/Disable
T0_OVF
Counter
(T0CNT)
Interrupt
Enable/Disable
T0_INT
CLK
Match
PND
Figure 10-8. Simplified Timer 0 Function Diagram: PWM Mode
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