A
PCIset Overview
PRELIMINARY
3
PCIset Product Overview
s
PCIset Host Bus Support
—
Supports Pentium Pro Processor
at 60 MHz, and 66 MHz Bus Speeds
—
64-Bit Data and 36-Bit Address Bus
—
Parity Protection on Control
Signals
—
Dual-Processor Support (450KX)
—
Up to Eight Deep In-Order Queue
—
Four Deep Outbound Request
Queue
—
Four Cache Line Read and Write
Buffers
—
GTL+ Bus Driver Technology
s
Host-to-PCI Bridge (PB)
—
Combines Both the Control and
Data Path in a Single Chip
—
Synchronous PCI Interface
—
32-bit Address/Data PCI Bus (64-bit
Dual Cycle Address Support)
—
Parity Protection on All PCI Bus
Signals
—
Four Deep Inbound Request Queue
—
Data Collection/Write Assembly of
Line Bursts.
—
Support for 3.3V & 5V PCI Devices
—
Available in 304 Pin QFP or 352 pin
BGA
—
ECC Protection on Host Data Bus
(450GX)
—
Quad-Processor Support (450GX)
—
Internal Bridge Arbiter For Two PBs
in a system (450GX)
s Memory Controller (MC)
—
1 GB Maximum Memory (450KX)
—
2-Way interleaved and Non-
Interleaved Memory Organizations
—
Supports 3.3V and 5V SIMMs
—
Supports Standard 32- or 36-bit
SIMMs or 72-bit DIMMs
—
Supports 4 Mbit, 16 Mbit, and
64 Mbit DRAM Technology
—
Single Bit Error Correction, Double
Bit and Nibble Error Detection
—
Memory Array Power Management
—
Recovers DRAM Memory Behind
Programmable Memory Gaps
—
Read Page Hit 8-1-1-1 (at 66 MHz,
60 ns DRAM)
—
Read Page Miss 11-1-1-1 (66 MHz,
60 ns DRAM)
—
Read Page Miss + Precharge 14-1-1-
1 (66 MHz, 60 ns DRAM)
—
Available in 208-Pin QFP for the DC;
240-Pin QFP or 256-Pin BGA for the
DP; 144-Pin QFP for the MIC
s On-Chip Digital PLL (Both PB and MC)
s Test Support (JTAG) (Both PB and MC)
—
4 GBs Maximum Main Memory (per
82453GX)
—
4-Way and 2-Way interleaved, and
Non-Interleaved Memory
Organizations (450GX)
—
Up to Two MCs in a System (450GX)
This document describes both the Intel 450KX and 450GX PCIsets. Unshaded areas apply to both the
PCIsets. Shaded areas, like this one, describe the 450GX operations that differ from the 450KX.
The Intel 450KX/GX PCIsets provide a high-performance system solution for Pentium Pro processor-based
PCI systems by combining high integration, high performance technology with a scalable architecture that is
capable of high throughput for up to four Pentium Pro processors. Scalability provides a wide range of system
solutions from cost-effective uniprocessor systems to high-end multiprocessor systems without sacrificing
performance. For systems requiring extensive I/O (e.g., file servers), a second PB can be easily added
providing two high-performance PCI bus structures. The flexibility of the memory controller permits easy
expansion from a simple non-interleaved organization to a 2-way or 4-way interleaved organization to increase
performance. Extended error checking and logging, ECC, and the ability to build in redundancy (e.g, multiple
processors and dual PCI bridges) provides a comprehensive solution for systems requiring high reliability.
The PCIset may contain design defects or errors known as errata. Current characterized errata are available
upon request.