1998 Dec 14
30
Philips Semiconductors
Preliminary specication
Economy teletext and TV microcontrollers
SAA5x9x family
8.6
Memory organisation of SAA5296/7,
SAA5296/7A and SAA5496/7
The teletext memory is divided into 10 blocks. Normally,
when the TXT1.EXT PKT OFF bit is logic 0, each of blocks
0 to 8 contains a teletext page arranged in the same way
as the basic page memory (see Fig.6) of the page device
and block 9 contains extension packets (see Fig.7).
When the TXT1.EXT PKT OFF bit is logic 1, no extension
packets are captured and block 9 of the memory is used to
store another page.
The number of the memory block into which a page is
written corresponds to the page request number which
resulted in the capture of the page.
Packet 0, the page header, is split into 2 parts when it is
written into the text memory. The first 8 bytes of the header
contain control and addressing information. They are
Hamming decoded and written into columns 0 to 7 of
row 25 (see Table 15). Row 25 also contains the
magazine number of the acquired page and the PBLF flag
but the last 14 bytes are unused and may be used by the
software, if necessary. The Hamming error flags are set if
the on-board 8/4 Hamming checker detects that there has
been an uncorrectable (2 bit) error in the associated byte.
It is possible for the page to still be acquired if some of the
page address information contains uncorrectable errors if
that part of the page request was a ‘don’t care’. There is no
error flag for the magazine number as an uncorrectable
error in this information prevents the page being acquired.
The interrupted sequence (C9) bit is automatically dealt
with by the acquisition section so that rolling headers do
not contain discontinuities in the page number sequence.
The magazine serial (C11) bit indicates whether the
transmission is a serial or a parallel magazine
transmission. This affects the way the acquisition section
operates and is dealt with automatically.
The newsflash (C5), subtitle (C6), suppress header (C7),
inhibit display (C10) and language control (C12 to 14) bits
are dealt with automatically by the display section,
described below.
The update (C8) bit has no effect on the hardware. The
remaining 32 bytes of the page header are parity checked
and written into columns 8 to 39 of row 0. Bytes which
pass the parity check have the MSB set to a logic 0 and
are written into the page memory. Bytes with parity errors
are not written into the memory.
Table 14 Notation used in Table 15
MNEMONIC
DESCRIPTION
MAG
Magazine
PT
Page Tens
PU
Page Units
HT
Hours Tens
HU
Hours Units
MT
Minutes Tens
MU
Minutes Units
Table 15 The data in row 25 of the basic page memory
COL
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
0000
Hamming error
PU3
PU2
PU1
PU0
1000
Hamming error
PT3
PT2
PT1
PT0
2000
Hamming error
MU3
MU2
MU1
MU0
3000
Hamming error
C4
MT2
MT1
MT0
4000
Hamming error
HU3
HU2
HU1
HU0
5000
Hamming error
C6
C5
HT1
HT0
6000
Hamming error
C10
C9
C8
C7
7000
Hamming error
C14
C13
C12
C11
8000
FOUND
0
MAG2
MAG1
MAG0
9
0
PBLF
0
0000
10 to 23
unused