参数资料
型号: SAB-C161O-L16M
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 16-BIT, 16 MHz, MICROCONTROLLER, PQFP80
封装: 0.65 MM PITCH, PLASTIC, MQFP-80
文件页数: 27/43页
文件大小: 741K
代理商: SAB-C161O-L16M
Semiconductor Group
32
1996 Intermediate Version
C161
Data hold after WR
t
23
CC 48 +
t
F
2TCL - 15
+
t
F
–ns
ALE rising edge after RD,
WR
t
25
CC 48 +
t
F
2TCL - 15
+
t
F
–ns
Address hold after RD,
WR
t
27
CC 48 +
t
F
2TCL - 15
+
t
F
–ns
ALE falling edge to CS
t
38
CC -5 -
t
A
10 -
t
A
-5 -
t
A
10 -
t
A
ns
CS low to Valid Data In
t
39
SR –
74
+
t
C + 2tA
3TCL - 20
+
t
C + 2tA
ns
CS hold after RD, WR
t
40
CC 79 +
t
F
3TCL - 15
+
t
F
–ns
ALE fall. edge to RdCS,
WrCS (with RW delay)
t
42
CC 26 +
t
A
TCL - 5
+
t
A
–ns
ALE fall. edge to RdCS,
WrCS (no RW delay)
t
43
CC -5 +
t
A
–-5
+
t
A
–ns
Address float after RdCS,
WrCS (with RW delay)
t
44
CC –
0
–0ns
Address float after RdCS,
WrCS (no RW delay)
t
45
CC –
31
TCL
ns
RdCS to Valid Data In
(with RW delay)
t
46
SR –
38 +
t
C
2TCL - 25
+
t
C
ns
RdCS to Valid Data In
(no RW delay)
t
47
SR –
69 +
t
C
3TCL - 25
+
t
C
ns
RdCS, WrCS Low Time
(with RW delay)
t
48
CC 53 +
t
C
2TCL - 10
+
t
C
–ns
RdCS, WrCS Low Time
(no RW delay)
t
49
CC 84 +
t
C
3TCL - 10
+
t
C
–ns
Data valid to WrCS
t
50
CC 48 +
t
C
2TCL - 15
+
t
C
–ns
Data hold after RdCS
t
51
SR 0
0–ns
Data float after RdCS
t
52
SR –
43 +
t
F
2TCL - 20
+
t
F
ns
Address hold after
RdCS, WrCS
t
54
CC 43 +
t
F
2TCL - 20
+
t
F
–ns
Data hold after WrCS
t
56
CC 43 +
t
F
2TCL - 20
+
t
F
–ns
Parameter
Symbol
Max. CPU Clock
= 16 MHz
Variable CPU Clock
1/2TCL = 1 to 16 MHz
Unit
min.
max.
min.
max.
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