参数资料
型号: SAB-C161O-L16M
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 16-BIT, 16 MHz, MICROCONTROLLER, PQFP80
封装: 0.65 MM PITCH, PLASTIC, MQFP-80
文件页数: 40/43页
文件大小: 741K
代理商: SAB-C161O-L16M
1996 Intermediate Version
Semiconductor Group
5
C161
WR/
WRL
26
O
External Memory Write Strobe. In WR-mode this pin is activated
for every external data write access. In WRL-mode this pin is
activated for low byte data write accesses on a 16-bit bus, and for
every data write access on an 8-bit bus. See WRCFG in register
SYSCON for mode selection.
ALE
27
O
Address Latch Enable Output. Can be used for latching the
address into external memory or an address latch in the
multiplexed bus modes.
EA
28
I
External Access Enable pin. A low level at this pin during and after
Reset forces the C161 to begin instruction execution out of
external memory. A high level forces execution out of the internal
ROM. The C161 must have this pin tied to ‘0’.
PORT0:
P0L.0 –
P0L.7,
P0H.0 -
P0H.7
29 –
36
39 –
46
I/O
PORT0 consists of the two 8-bit bidirectional I/O ports P0L and
P0H. It is bit-wise programmable for input or output via direction
bits. For a pin configured as input, the output driver is put into
high-impedance state.
In case of an external bus configuration, PORT0 serves as the
address (A) and address/data (AD) bus in multiplexed bus modes
and as the data (D) bus in demultiplexed bus modes.
Demultiplexed bus modes:
Data Path Width:
8-bit
16-bit
P0L.0 – P0L.7:
D0 - D7
P0H.0 – P0H.7:
I/O
D8 - D15
Demux bus is only available on the C161K and the C161O.
Multiplexed bus modes:
Data Path Width:
8-bit
16-bit
P0L.0 – P0L.7:
AD0 - AD7
P0H.0 – P0H.7:
A8 - A15
AD8 - AD15
PORT1:
P1L.0 –
P1L.7,
P1H.0 -
P1H.7
47 -
54
55 -
62
I/O
PORT1 consists of the two 8-bit bidirectional I/O ports P1L and
P1H. It is bit-wise programmable for input or output via direction
bits. For a pin configured as input, the output driver is put into
high-impedance state.
The C161K and the C161O use PORT1 as the 16-bit address bus
(A) in demultiplexed bus modes and also after switching from a
demultiplexed bus mode to a multiplexed bus mode.
RSTIN
65
I
Reset Input with Schmitt-Trigger characteristics. A low level at this
pin for a specified duration while the oscillator is running resets the
C161. An internal pullup resistor permits power-on reset using
only a capacitor connected to
V
SS.
Pin Definitions and Functions (cont’d)
Symbol
Pin
Number
Input
Output
Function
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