参数资料
型号: SAB80C517A-N18-T3
厂商: INFINEON TECHNOLOGIES AG
元件分类: 微控制器/微处理器
英文描述: 8-BIT, 18 MHz, MICROCONTROLLER, PQCC84
封装: PLASTIC, LCC-84
文件页数: 48/137页
文件大小: 2089K
代理商: SAB80C517A-N18-T3
Semiconductor Group
3 - 10
Memory Organization
Accesses to XRAM using the Registers R0/R1
The 8051 architecture provides also instructions for access to external data memory range which
use only an 8-bit address (indirect addressing with registers R0 or R1). The instructions are:
MOVX
A, @ Ri
(Read)
MOVX
@Ri, A
(Write)
In application systems, either a real 8-bit bus (with 8-bit address) is used or Port 2 serves as page
register which selects pages of 256-Byte. However, the distinction, whether Port 2 is used as
general purpose I/0 or as "page address" is made by the external system design. From the device’s
point of view it cannot be decided whether the Port 2 data is used externally as address or as I/0
data!
Hence, a special page register is implemented into the SAB 80C517A to provide the possibility of
accessing the XRAM also with the MOVX @Ri instructions, i.e. XPAGE serves the same function
for the XRAM as Port 2 for external data memory.
Special Function Register XPAGE
The reset value of XPAGE is 00H.
XPAGE can be set and read by software.
Figures 3-2 to 3-4 show the dependencies of XPAGE- and Port 2 - addressing in order to explain
the differencies in accessing XRAM, ext. RAM or what is to do when Port 2 is used as an I/O-port.
76
543
210
MSB
LSB
Bit No.
XPAGE
Addr. 91H
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