参数资料
型号: SC1485ITSTRT
厂商: Semtech
文件页数: 11/27页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 28-TSSOP
标准包装: 1
PWM 型: 控制器
输出数: 2
占空比: 90%
电源电压: 1.8 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
包装: 标准包装
产品目录页面: 1358 (CN2011-ZH PDF)
其它名称: SC1485ITSDKR
POWER MANAGEMENT
NOT RECOMMENDED FOR NEW DESIGN
SC1485
Be sure to include inductor resistance and MOSFET on-
state voltage drops when performing worst-case dropout
duty-factor calculations.
SC1485 System DC Accuracy
Two IC parameters affect system DC accuracy, the error
comparator threshold voltage variation and the
switching frequency variation with line and load. The
error comparator threshold does not drift significantly
with supply and temperature. Thus, the error
comparator contributes 1% or less to DC system
inaccuracy.
Board components and layout also influence DC
accuracy. The use of 1% feedback resistors contribute
1%. If tighter DC accuracy is required use 0.1%
feedback resistors.
The on pulse in the SC1485 is calculated to give a
pseudo fixed frequency. Nevertheless, some frequency
variation with line and load can be expected. This
variation changes the output ripple voltage. Because
constant-on regulators regulate to the valley of the
output ripple, ? of the output ripple appears as a DC
regulation error. For example, if the feedback resistors
are chosen to divide down the output by a factor of five,
the valley of the output ripple will be VOUT. For example:
if VOUT is 2.5V and the ripple is 50mV with VBAT = 6V,
then the measured DC output will be 2.525V. If the ripple
increases to 80mV with VBAT = 25V, then the measured
DC output will be 2.540V.
The output inductor value may change with current. This
The maximum input voltage (V BAT(MAX) ) is determined by
the highest AC adaptor voltage. The minimum input
voltage (V BAT(MIN) ) is determined by the lowest battery
voltage after accounting for voltage drops due to
connectors, fuses and battery selector switches. For the
purposes of this design example we will use a V BAT range
of 8V to 20V and design OUT2. The design for OUT1
employs the same technique.
Four parameters are needed for the output:
1) nominal output voltage, V OUT (we will use 1.2V)
2) static (or DC) tolerance, TOL ST (we will use +/-4%)
3) transient tolerance, TOL TR and size of transient (we will
use +/-8% and 6A for purposes of this demonstration).
4) maximum output current, I OUT (we will design for 6A)
Switching frequency determines the trade-off between
size and efficiency. Increased frequency increases the
switching losses in the MOSFETs, since losses are a
function of VIN 2 . Knowing the maximum input voltage and
budget for MOSFET switches usually dictates where the
design ends up. It is recommended that the two outputs
are designed to operate at frequencies approximately
25% apart to avoid any possible interaction. It is also
recommended that the higher frequency output is the
lower output voltage output, since this will tend to have
lower output ripple and tighter specifications. The
default R tON values of 1M ? and 715k ? are suggested
as a starting point, but these are not set in stone. The
first thing to do is to calculate the on-time, t ON , at V BAT(MIN)
and V BAT(MAX) , since this depends only upon V BAT , V OUT and
R tON .
For V OUT < 3.3V:
t ON _ VBAT ( MIN ) = ? 3 . 3 ? 10 ? 12 ? ( R tON + 37 ? 10 3 ) ?
t ON _ VBAT ( MAX ) = ? 3 . 3 ? 10 ? 12 ? ( R tON + 37 ? 10 3 ) ?
V OUT ?
? + 50 ? 10 s
? + 50 ? 10 s
will change the output ripple and thus the DC output
voltage. It will not change the frequency.
Switching frequency variation with load can be minimized
by choosing MOSFETs with lower R DS(ON) . High R DS(ON)
MOSFETs will cause the switching frequency to increase
as the load current increases. This will reduce the ripple
and thus the DC output voltage.
and
?
? ?
?
? ?
V BAT ( MIN ) ? ?
V OUT ?
V BAT ( MAX ) ? ?
? 9
? 9
Design Procedure
Prior to designing an output and making component
From these values of t ON we can calculate the nominal
switching frequency as follows:
( V
BAT ( MIN ) ? t ON _ VBAT ( MIN ) )
selections, it is necessary to determine the input voltage
range and the output voltage specifications. For purposes
of demonstrating the procedure the output for the
schematic in Figure 8 on Page 16 will be designed.
? 2005 Semtech Corp.
11
f SW _ VBAT ( MIN ) =
and
V OUT
Hz
www.semtech.com
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