参数资料
| 型号： | SC195ULTRT |
| 厂商： | Semtech |
| 文件页数： | 12/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 0.5A 8MLPQ |
| 特色产品： | SC195 Buck Regulator |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 3.3 V |
| 输入电压： | 2.9 V ~ 5.5 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 3.5MHz |
| 电流 - 输出： | 500mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-MLPQ |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-MLPQ-UT（1.5x1.5） |
| 产品目录页面： | 1357 (CN2011-ZH PDF) |
| 其它名称： | SC195ULDKR |
SC195
Applications Information
General Description
The SC195 is a synchronous step-down Pulse Width
Modulated (PWM) DC-DC regulator utilizing a 3.5MHz
fixed-frequency voltage mode architecture. The device is
designed to operate in fixed-frequency PWM mode and
enter power save (PSAVE) mode utilizing pulse frequency
modulation under light load conditions to maximize effi-
ciency. The device requires only two capacitors and a
single inductor to be implemented in most systems. The
switching frequency has been chosen to minimize the size
of the inductor and capacitors while maintaining high
efficiency. The output voltage is programmable, eliminat-
ing the need for external programming resistors. Loop
compensation is also internal, eliminating the need for
external components to control stability.
GND or IN. This option allows dynamic voltage adjust-
ment for systems that reduce the supply voltage when
entering sleep states. Note that applying all zeros to the
CTL pins when changing the output voltages will tempo-
rarily disable the device, so it is important to avoid this
combination when dynamically changing levels.
Adjustable Output Voltage Selection
If an output voltage other than one of the 15 program-
mable settings is needed, an external resistor divider
network can be added to the SC195 to adjust the output
voltage setting. This network scales the output based on
the resistor ratio and the programmed output setting.
The resistor values can be determined using the
equation
Programmable Output Voltage
The SC195 has 15 fixed output voltage levels which can be
V OUT
V SET
R FB1 R FB 2
R FB 2
I LEAK R FB 1
individually selected by programming the CTL control
pins (CTL3-0 — see Table 1 on page 2 for settings). The
device is disabled whenever all four CTL pins are pulled
low and enabled whenever at least one of the CTL pins is
pulled high. This configuration eliminates the need for a
dedicated enable pin. Each CTL pin is internally pulled
down via 1MΩ if V IN is below 1.5V or if the voltage on the
control pin is below the input high voltage. This ensures
that the output is disabled when power is applied if there
are no inputs to the CTL pins. Each weak pull-down is dis-
abled whenever its pin is pulled high and remains disabled
until all CTL pins are pulled low.
where V OUT is the desired output voltage, V SET is the voltage
setting selected by the CTL pins, R FB1 is the resistor
between the output capacitor and the OUT pin, R FB2 is the
resistor between the OUT pin and ground, and I LEAK is the
leakage current into the OUT pin during normal opera-
tion. The current into the OUT pin is typically 1μA, so the
last term of the equation can be neglected if the current
through R FB2 is much larger than 1μA. Selecting a resistor
value of 10kΩ or lower will simplify the design. If I LEAK is
neglected and R FB2 is fixed, R FB1 can be determined using
the equation
The output voltage can be set using different approaches.
If a static output voltage is required, the CTL pins can be
tied to either IN or GND to set the desired voltage when-
R FB 1
R FB 2
V OUT V SET
V SET
ever power is applied at IN. If enable control is required,
each CTL pin can be tied to either GND or to a micropro-
cessor I/O line to create the desired control code whenever
the control signal is forced high. This approach is equiva-
lent to using the CTL pins collectively as a single enable
pin. A third option is to connect each of the four CTL pins
to individual microprocessor I/O lines. Any of the 15
output voltages can be programmed using this approach.
Inserting resistance in the feedback loop will adversely
affect the system’s transient performance if feed-forward
capacitance is not included in the circuit. The circuit in
Figure 1 illustrates how the resistor divider and feed-
forward capacitor can be added to the SC195 schematic.
The value of feed-forward capacitance needed can be
determined using the equation
V SET V OUT
0 . 5
Ifonlytwooutputvoltagesareneeded,theCTLpinscan
be combined in a way that will reduce the number of I/O
lines to 1, 2, or 3, depending on the control code for each
C FF
4 10
6
R FB 1
V OUT V SET V SET
2
0 . 5
desired voltage. Other CTL pins could be hard wired to
12
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