参数资料
型号: SC195ULTRT
厂商: Semtech
文件页数: 16/20页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.5A 8MLPQ
特色产品: SC195 Buck Regulator
标准包装: 1
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 3.3 V
输入电压: 2.9 V ~ 5.5 V
PWM 型: 电压模式
频率 - 开关: 3.5MHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-MLPQ
包装: 标准包装
供应商设备封装: 8-MLPQ-UT(1.5x1.5)
产品目录页面: 1357 (CN2011-ZH PDF)
其它名称: SC195ULDKR
SC195
Applications Information (continued)
C OUT Selection
The internal voltage loop compensation in the SC195
limits the minimum output capacitor value to 10μF. This
is due to its influence on the the loop crossover frequency,
phase margin, and gain margin. Increasing the output
capacitor above this minimum value will reduce the cross-
over frequency and provide greater phase margin.
The output capacitor determines the output voltage
ripple and contributes load current during large step load
transitions. A capacitor between 10 μF and 22 μF will
usually be adequate in stabilizing the output during large
load transitions.
Capacitors with X7R or X5R ceramic dielectric are recom-
mended for their low ESR and superior temperature and
voltage characteristics. Y5V capacitors should not be used
as their temperature coefficients make them unsuitable
In this example, using a standard 10μF capacitor would be
adequate to keep voltage droop less than the desired
limit. Note that if the voltage droop limit were decreased
from 50mV to 25mV, the output capacitance would need
to be increased to at least 12μF (twice as much capaci-
tance for half the droop). Capacitance will decrease from
the nominal value when a ceramic capacitor is biased with
a DC current, so it is important to select a capacitor whose
value exceeds the necessary capacitance value at the pro-
grammed output voltage. Check the manufacturer ’s
capacitance vs. DC voltage graphs when selecting an
output capacitor to ensure the capacitance will be
adequate.
Table 3 lists the manufacturers of recommended output
capacitor options.
Table 3 — Recommended Output Capacitors
for this application.
In addition to ensuring stability, the output capacitor
serves other important functions. This capacitor deter-
mines the output voltage ripple — as capacitance
increases, ripple voltage decreases. It also supplies current
during a large load step for a few switching cycles until
the control loop responds (typically 3 switching cycles).
Once the loop responds, regulation is restored and the
desired output is reached. During the period prior to PWM
Manufacturer
Part Nunber
Murata 
GRM188R60J106ME47D
Murata 
GRM21BR60J106K
Taiyo Yuden
JMK107BJ106MA-T
TDK
C1608X5R0J106MT
Value
(μF)
10±20%
10±10%
10±20%
10±20%
Type
X5R
X5R
X5R
X5R
Rated
Voltage
(VDC)
6.3
6.3
6.3
6.3
Dimensions
LxWxH (mm)
Case Size
1.6x0.8x0.8
0603
2.0x1.25x1.25
0805
1.6x0.8x0.8
0603
1.6x0.8x0.8
0603
operation resuming, the relationship between output
voltage and output capacitance can be approximated
using the equation
C IN Selection
The SC195 input source current will appear as a DC supply
C OUT
3  I LOAD
V DROOP f
current with a triangular ripple imposed on it. To prevent
large input voltage ripple, a low ESR ceramic capacitor is
required. A minimum value of 4.7μF should be used. It is
important to consider the DC voltage coefficient charac-
This equation can be used to approximate the minimum
output capacitance needed to ensure voltage does not
droop below an acceptable level. For example, a load step
from 50mA to 400mA requiring droop less than 50mV
would require the minimum output capacitance to be
teristics when determining the actual required value. For
example, a 10μF, 6.3V, X5R ceramic capacitor with 5V DC
applied may exhibit a capacitance as low as 4.5μF. The
value of required input capacitance is estimated by deter-
mining the acceptable input ripple voltage and calculating
the minimum value required for C IN using the equation
C OUT
3 0 . 4
0 . 05 4 10 6
6 . 0 F
C IN
V OUT
V IN
V
I OUT
1
V OUT
V IN
ESR f
16
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