参数资料
| 型号： | SC419ULTRT |
| 厂商： | Semtech |
| 文件页数： | 17/24页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 20-MLPQ |
| 标准包装： | 1 |
| 系列： | EcoSpeed®, SmartDrive™ |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 电源电压： | 3 V ~ 28 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 20-MLPQ |
| 包装： | 标准包装 |
| 其它名称： | SC419ULTRTDKR |
SC419
Applications Information (continued)
L
0 . 77 H
Tofindtheminimuminductanceneeded,usetheV IN and
T ON values that correspond to V INMAX .
(13 . 2 1 . 05 ) 318ns
5 A
A slightly larger value of 0.88μH is selected. This will
decrease the maximum I RIPPLE to 4.4A.
Note that the inductor must be rated for the maximum DC
The output capacitance is chosen to meet transient
requirements. A worst-case load release, from maximum
load to no load at the exact moment when inductor
current is at the peak, determines the required capaci-
tance. If the load release is instantaneous (load changes
from maximum to zero in < 1μs), the output capacitor
must absorb all the inductor ’s stored energy. This will
cause a peak voltage on the capacitor according to the
following equation.
L I OUT
V OUT
loadcurrentplus1/2oftheripplecurrent.
The ripple current under minimum V IN conditions is also
checked using the following equations.
COUT MIN
1
2
V PEAK
2
I RIPPLEMAX
2
2
T ON _ VINMIN
25pF R TON V OUT
V INMIN
10 ns
384 ns
Assuming a peak voltage V PEAK of 1.150 (100mV rise upon
load release), and a 10A load release, the required capaci-
tance is shown by the next equation.
( V IN
4 . 4
1 . 05
I RIPPLE
I RIPPLE _ VINMIN
V OUT ) T ON
L
(10 . 8 1 . 05 ) 384ns
088 H
4 . 25 A
0 . 88 H 10
COUT MIN 2
1 . 15
COUT MIN = 595μF
1
2
2
2
Capacitor Selection
The output capacitors are chosen based on required ESR
and capacitance. The maximum ESR requirement is con-
trolled by the output ripple requirement and the DC toler-
ance. The output voltage has a DC value that is equal to
the valley of the output ripple plus 1/2 of the peak-to-peak
ripple. Change in the output ripple voltage will lead to a
change in DC voltage at the output.
The design goal is for the output voltage regulation to be
±4% under static conditions. The internal 500mV refer-
ence tolerance is 1%. Allowing 1% tolerance from the FB
resistor divider, this allows 2% tolerance due to V OUT ripple.
Since this 2% error comes from 1/2 of the ripple voltage,
the allowable ripple is 4%, or 42mV for a 1.05V output.
The maximum ripple current of 4.4A creates a ripple
voltage across the ESR. The maximum ESR value allowed
is shown by the following equations.
If the load release is relatively slow, the output capacitance
can be reduced. At heavy loads during normal switching,
when the FB pin is above the 500mV reference, the DL
output is high and the low-side MOSFET is on. During this
time, the voltage across the inductor is approximately
-V OUT . This causes a down-slope or falling di/dt in the
inductor. If the load di/dt is not faster than the -di/dt in
the inductor, then the inductor current will tend to track
the falling load current. This will reduce the excess induc-
tive energy that must be absorbed by the output capaci-
tor, therefore a smaller capacitance can be used.
The following five equations can be used to calculate the
needed capacitance for a given dI LOAD /dt.
Peak inductor current is shown by the next equation.
I LPK = I MAX + 1/2 x I RIPPLEMAX
ESR MAX
V RIPPLE
I RIPPLEMAX
ESR MAX = 9.5 m?
42 mV
4 . 4 A
I LPK = 10 + 1/2 x 4.4 = 12.2A
Rate of change of Load Current
dl LOAD
dt
17
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