参数资料
| 型号： | SC4525ASETRT |
| 厂商： | Semtech |
| 文件页数： | 11/19页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK 3A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出数： | 1 |
| 输入电压： | 8 V ~ 28 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 300kHz ~ 1.3MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOIC-EP |
| 产品目录页面： | 1358 (CN2011-ZH PDF) |
| 其它名称： | SC4525ASEDKR |
L 1 =
O D
20 % ? I O ? F SW
I RMS _ CIN = I O ? D ? ( 1 ? D )
SC4525A
V o
V c
=
D V = D I L ? ? ? ESR +
?
8 ? F SW ? C O ? ?
ApplicationsInformation(Cont.)
Minimum Off Time Limitation
? 1 ?
?
The input O capacitance must also be high enough to keep
input ripple voltage within specification. This is important
G PWM
be able 4 to R reach V O its ? set ? ? value in continuous-conduction
R = 6 ?
1
Inductor Selection D
V IN + V D ? V CESAT
R D 4 I L = = R 6 ? ? O O D ? 1 ? ?
( V V + V ) ? ( 1 ? D )
? 1 . 0 F SW ? L 1 ?
V
inductance. ( V O V + O V + D ) V ? D ( 1 ? D )
V IN 20 V % D ? ? I O V ? CESAT
L D 1 = =
among efficiency, cost and size. Re-arranging Equation (3)
F SW ? L 1
L D 1 V O = = D O I L ? ? ? ESR +
( V + V D ) ? ( 1 ? D ) 1 ?
35 V % ? ? I O ? F SW 8 ? F SW ? C O ? ?
R 4 = R 6 ?
? 1 ?
I RMS _ CIN = I O ? D ? ( 1 ? D )
C D IN = > V + V O ? V
4 ? D V IN ? F CESAT
The peak current limit of SC4525A power transistor is at
SC4525A is 3.6A ? ? ? minus one F half C of ? ? the inductor ripple
( V O + ? V D ) ? ( 1 8 ? D ? ) SW ? O ?
current. I L =
L C 1 = > O
The input capacitor O should be chosen to handle the RMS
?
R 7 =
A C =
R C 4 IN = > R 6 ? ?
? 1 ?
V O I O
4 ? ? 1 D . V 0 IN V ? F SW ??
? 1 1 V ? A C =
A where 20 V ? IN log ? ? the allowable input ripple voltage.
? FB ? ?
C = ?
? V G O CA + R V S D 2 π F C C O
Multi-layer V ceramic ? capacitors, which have very low ESR
IN + V D
A C = ? 20 ? log ? ?
(a few m W ) and can easily handle high RMS ripple current, . 0 ?
are the ideal ? choice . 1 for 10 input 2 π filtering. A ? single 4.7μF . 3 ? 7
? ? ? R 15
28 ? 6
?
? 80 ? 10
22 ? 10
3
X5R ceramic ( capacitor ( is adequate for 500kHz or higher
F SW ? L 1
for 200kHz to 500kHz switching frequency. For high
10 20 ?
A voltage 28 applications, a ? small ceramic ? ? ( μF or 2.2μF) can be
log ? ? 3
R 7 = = 1 22 . 3 k 1 V ?
C = 0 . 20 ? ? 10 ?
C 8 =
( V O G CA R S ( 1 2 π D C C O V O ?
2 π ? 16 ? 10 ? 22 . 1 1 ? 10 3
A C = ? 20 ? log ? ?
1 1 . 0 ?
28 1 ? 6 . 1 ? 10 ? 3 2 π ? 80 ? 10 3 ? 22 ? 10 ? 6 3 . 3 ? V o
=
C 8 =
= 12 pF
2 π 600 ? 10 O ? 22 . 1 1 10 D )
V c
R expressed as ? 3 = 22 . 3 k
7 =
= 0 . 28 ? 10 PWM ?
V o G ( 1 + s R ESR C O )
? G PWM
( 1 D + V s O / = ω D ) I ( L 1 1 ? + ? ? ESR ω + n Q + s 2 / ω n 2 ) ? ?
V c
s /
1
8 ? 3 F SW 0 ? . C 45 O nF
C 5 =
=
3 ? ?
R 7 =
where C O is the output capacitance.
G A PWM = = ? ≈ 20 ? log ? ? , 3 1
1
? ω p ≈ 3 R C = ? 12 FB pF ? ?
ω Z =
,
,
C 8
Since the inductor ? R 22 ripple C C current ? D I L increases as D
2 G 600 S 10 . 1 ? 10 R ESR C O
? G CA I O S 2 π F
O V
4 ? D V IN ? F SW
decreases > (Equation (3)), the output ripple voltage is C 5 =
therefore the ? highest when V is at its maximum.
10
R A V 7 o C = ? 20 ? log PWM ( 1 + s 1 R ESR C O ) IN ?
1 1 . 0 ?
= g m
G ? ? 3 3 ? 6 ? ? = 15
( 1 + s / ω p ? ) ( 1 + s / ω n Q + s 2 / ω n 2 )
3 . 3 ? C =
V A 22μF to 47μF X5R ceramic capacitor is found adequate
C for = output filtering in most applications. Ripple current
in the π 10 Z 1 R 20 R 7 capacitor is not 1 a concern because 1 the
2 F output
5
G inductor 1 current of a buck ≈ converter directly = feeds C , ,
= 0 . 28 CA ? 10 S
C resulting in very low ripple current. Avoid using Z5U O
G ? R R C O R ESR C O
2 π F P 1 R 7
1
C and Y5V ceramic capacitors for 0 output filtering because
10 π types of capacitors have high temperature and high
R these
7 =
C 8 = = 12 pF
2 π ? 600 ? 10 3 ? 22 . 1 ? 10 3
C Freewheeling Diode
5 =
Use of Schottky ( barrier diodes as freewheeling rectifiers
= =
1
C V reduces + s diode ) ( 1 reverse Q recovery ω 2 input current spikes,
2 π F / ω p + s / ω n + s 2 / n )
c
easing high-side current sensing in the SC4525A. These
The PWM latch in Figure 2 is reset every cycle by the
clock. The clock also turns off the power transistor to
refresh the bootstrap capacitor. This minimum off time
limits the attainable duty cycle of the regulator at a given
switching frequency. The measured minimum off time is
00ns typically. If the required duty cycle is higher than
the attainable maximum, then the output voltage will not
?
mode. ? 1 . 0 V ?
D =
The inductor ripple current for a non-synchronous step-
down converter in continuous-conduction mode is
(3)
where F SW is the switching frequency and L is the
+ F SW
An inductor ripple current between 20% to 50% of the
maximum load current, I O , gives a good compromise
D I L =
and assuming 35% inductor ripple current, the inductor is
given by
? (4)
? O ?
? 1 . 0 V ?
If the input voltage varies over a wide range, then choose
L based on the nominal input voltage. Always verify
V O I + V D
converter operation at the input voltage extremes.
SW
? ? 1
least 3.6A. The maximum deliverable load current for the
D V O = D I L ESR +
F SW ? L 1
Input Decoupling Capacitor
I O
( V + V D ) ? ( 1 ? D )
IN
ripple current of a buck converter. This value is given by
I RMS _ CIN = I O ? D ? (1 ? D) (5)
in reducing the conductive EMI from the regulator. The
input capacitance can be estimated from
D is ?
D =
V CESAT
? 3 3 ? 6
15 . 9
? ? FB
= 1 1
? I ? F 5 = = 0 . 45 nF 20 %
placed L in parallel with a low ESR electrolytic capacitor to
C satisfy both the 3 ESR O and SW bulk capacitance requirements.
? ? ? = 15
?
Output Capacitor
?
The output 15 . 9 ripple voltage D V O of a buck converter can be
10 20
p (7)
2 π ? 16 ? 10 ? 22 . 1 ? 10
R 1 1 V ? 1
C
O O
A C
20
28 ? 6 . 1 ? 10 2 π ? 80 ? 10 ? 22 ? 10
1
15 . 9
7 = ,
R PWM ≈ ? 3 = 22 . 3 k ω p , ω Z
8
2 20 ? 16 ? 10 3 ? 22 . 1 ? 10
m 1
voltage coefficients.
1
2 π F Z 1 R 7
o
8
P 1 7
(6) C 5 =
V O ? C 8 =
I L = D
switching frequency applications, and 0μF is adequate C 5 =
c 8
D V = D I ? ? ESR +
?
1
?
1
?
G PWM ≈
R
G CA ? R S
,
ω p ≈
1
R C O
,
ω Z =
R ESR C O
,
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