参数资料
| 型号： | SC4525DSETRT |
| 厂商： | Semtech |
| 文件页数： | 10/21页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1 V ~ 16.74 V |
| 输入电压： | 3 V ~ 18 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 65kHz ~ 350kHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOIC-EP |
| 其它名称： | SC4525DSEDKR |
SC4525D
Applications Information (Cont.)
the latch B 3 . The soft-start capacitor is discharged with
(I D - I C ) (Figure 3). If the inductor current falls below the
current limit and the PWM comparator instead turns off
the switch, then latch B 3 will be reset and I C will recharge
the soft-start capacitor. If over-current condition persists
or OC becomes asserted more often than PWM over
a period of time, then the soft-start capacitor will be
In peak current-mode control, the PWM modulating
ramp is the sensed current ramp of the power switch.
This current ramp is absent unless the switch is turned
on. The intersection of this ramp with the output of the
voltage feedback error amplifier determines the switch
pulse width. The propagation delay time required to
immediately turn off the switch after it is turned on is the
discharged below .9V. At this juncture, comparator B 4 minimum controllable switch on time (T ON(MIN) ).
sets the overload latch B 2 . The soft-start capacitor will be
continuously discharged with (I D - I C ). The COMP pin is Closed-loop measurement shows that the SC4525D
vs Temp Fig.4: Min is
immediately pulled to ground. The switching regulator On-Time minimum on time is about 20ns at room temperature
or it will jitter.
shutoffuntilthesoft-startcapacitorisdischargedbelow
.0V. At this moment, the overload latch is reset. The
soft-start capacitor is recharged and the converter again
(Figure 4). If the required switch on time is shorter than
the minimum on time, the regulator will either skip cycles
SS270 REV 6-7
undergoes soft-start. The regulator will go through soft-
start, overload shutdown and restart until it is no longer
overloaded.
If the FB voltage falls below 0.8V because of output
overload, then the switching frequency will be reduced.
Frequency foldback helps to limit the inductor current
when the output is hard shorted to ground.
During normal operation, the soft-start capacitor is
charged to 2.4V.
200
180
160
140
120
Minumum On Time vs Temperature
V O =1.5V, I O =1A
Setting the Output Voltage
100
-50
-25
0
25
50
75
100 125
The regulator output voltage, V O , is set with an external
pin. For a given R 6 value, R 4 can be found by
?
V ?
A C = ? 20 ? log ? ?
? FB ? ?
with Ambient Temperature
?
R 4 = R 6 ? ?
? ? ?
V O
A C = switch on time should be ? 3 at ? least 20% to 3 30% higher ? than ? ? = 5 . 9
? 20 ? log ? ?
A the = worst-case ? ? ? 6
π ? ?
? 20 ? log 28
? ? minimum on time. 80 ? 0 ? 22 ? 0 ? 6 3 . 3 ?
V O ? ?
Minimum On + Time Consideration
? ?
V O
V D
G CA R S 2 π F C C O
?
V O V CESAT ?
The operating D ? duty cycle of a non-synchronous step-
R 4 V = IN R + 6 V ? ?
Minimum Off Time Limitation
? ?
down switching . 0 V regulator in continuous-conduction
The 0 20 latch 22 . 3 Figure 2 is reset every cycle by the . 0 ?
?
?
PWM in k
R 7 A = = ? 20 ? log ? ? =
?
?
= 5
clock. The clock also . turns off 2 π the 80 power ? transistor to 3 . 3 ??
? 0 3 22 ? 0 ? 6
? 28 ? 6
? 0
?
( V + V V O D + ) ? V ( D ? D )
D I L D = = O
C 5 limits the attainable duty 3 cycle of the regulator at a given
= = 0 . 45 nF
V IN + F V SW D ? ? L V CESAT
2 π ? 6 ? 5 0 . 9
? 22 . ? 0
( and V V D ) ? is voltage drop across the rectifying C 8 = 2 π 0 ? . 600 ? 0 3 ? 22 . ? 0 3 = 2 pF
where V IN is the input voltage, V CESAT is the switch saturation R 00ns typically. = the 3 required duty cycle is higher than
V O +
( ? D )
voltage, =
? 0
diode. D I = 20 ( V % O ? + I O V ? D F ) SW ? ( ? D )
C be = able to reach its set value = in . continuous-conduction
2 π ? 6 ? 0 ? 22 . ? 0 3
F SW ? L
G PWM ( + s R ESR C O )
V o
= =
V c C 8 ( + 2 s π ? / 600 ) ( ? 0 s 3 / ? 22 n Q + ? 0 2 3 / ω = n 2 2 pF
ω .
I RMS _ CIN ( V I O + V D ? ( ? D ) ) ω p + s ) 0
L =
Temperature ( O C)
resistive divider (Figure ) with its center tap tied to the FB
Figure 4. Variation of Minimum On Time
? G CA R S 2 π F C C O V O ?
To allow for transient headroom, the minimum operating
? . 0 V ? . 0
C
D =
5 . 9
mode (CCM) is given by C 0 . 28 ? 0 ? 3 ? 3
refresh the bootstrap capacitor. This minimum off time
3
0 20
switching frequency. The measured minimum off time is
28
L D the attainable maximum, then the output voltage will not
L
mode.
O D
20 % ? I O ? F SW
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