参数资料
| 型号： | SC4525DSETRT |
| 厂商： | Semtech |
| 文件页数： | 13/21页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1 V ~ 16.74 V |
| 输入电压： | 3 V ~ 18 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 65kHz ~ 350kHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm Width）裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SOIC-EP |
| 其它名称： | SC4525DSEDKR |
SC4525D
Applications Information (Cont.)
Substituting the first equation into the second equation,
Since the current loop is internally closed, the remaining
task for the loop compensation is to design the voltage
compensator (C 5 , R 7 , and C 8 ).
where V SS is the soft-start capacitor voltage and I SS is the
soft-start charging current. V is the voltage defined in
Figure 2.
CONTROLLER AND SCHOTTKY DIODE
CA Rs
Io
To ensure successful startup, the total current drawn
from the output must be less than the maximum output
FB
REF
+
-
EA
Vc
Vramp
PWM
MODULATOR
SW
L1
Vo
capability of the part,
C5
R7
COMP
C8
Co
Resr
R4
R6
Substituting the third equation of this section into the
previous equation,
Figure 7 — Block diagram of control loops
V o G PWM ( + s R ESR C O )
G PWM ≈
Rearranging,
Therefore the minimum C SS depends on the output
capacitance and the load current. Larger C SS is necessary
when starting into a heavy load (small R). If V IN rise time
exceeds 00ms, then a larger C SS may be necessary
to produce a monotonic rising output. Always verify
converter start-up on the bench.
Loop Compensation
The goal of compensation is to shape the frequency
For a converter with switching frequency F SW , output
inductance L , output capacitance C O and loading R, the
control (V C ) to output (V O ) transfer function in Figure 7 is
given by:
=
c 2
V ( + s / ω p ) ( + s / ω n Q + s 2 / ω n )
This transfer function has a finite DC gain
R
G CA x R S
an ESR zero F Z at
response of the converter so as to achieve high DC
accuracy and fast transient response while maintaining
loop stability.
ω Z =
R ESR C O
ω p ≈
TheblockdiagraminFigure7showsthecontrolloopsofa
buck converter with the SC4525D. The inner loop (current
loop) consists of a current sensing resistor (R s =3.53m W )
and a current amplifier (CA) with gain (G CA = 8.5). The
outer loop (voltage loop) consists of an error amplifier
(EA), a PWM modulator, and a LC filter.
a dominant low-frequency pole F P at
R C O
and double poles at half the switching frequency.
3
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