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参数资料
| 型号： | SCAN182374ASSC |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 总线收发器 |
| 中文描述： | SCAN/JTAG/3J SERIES, 9-BIT BOUNDARY SCAN MEMORY DRIVER, TRUE OUTPUT, PDSO56 |
| 封装： | 0.300 INCH, MO-118, SSOP-56 |
| 文件页数： | 3/12页 |
| 文件大小： | 103K |
| 代理商： | SCAN182374ASSC |
11
www.fairchildsemi.com
SCAN18237
4A
AC Operating Requirements
Scan Test Operation
Note 8: Voltage Range 5.0V
± 0.5V
Note 9: This delay represents the timing relationship between the data input and TCK at the associated scan cells numbered 0–8, 9–17, 18–26 and 27–35.
Note 10: Timing pertains to BSR 38 and 41 only.
Note 11: This delay represents the timing relationship between AOE/BOE and TCK for scan cells 36 and 39 only.
Note 12: Timing pertains to BSR 37 and 40 only.
Note: All Input Timing Delays involving TCK are measured from the rising edge of TCK.
Capacitance
TA = 25°C
Note 13: COUT is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012.
Symbol
Parameter
VCC
TA = 40°C to +85°C
Units
(V)
CL = 50 pF
(Note 8)
Guaranteed Minimum
tS
Setup Time
5.0
2.7
ns
Data to TCK (Note 9)
tH
Hold Time
5.0
3.1
ns
Data to TCK (Note 9)
tS
Setup Time, H or L
5.0
ns
AOE1, BOE1 to TCK (Note 10)
tH
Hold Time, H or L
5.0
1.8
ns
TCK to AOE1, BOE1 (Note 10)
tS
Setup Time, H or L
5.0
3.6
ns
Internal AOE, BOE to TCK (Note 11)
tH
Hold Time, H or L
5.0
2.1
ns
TCK to Internal AOE, BOE (Note 11)
tS
Setup Time
5.0
3.4
ns
ACP, BCP (Note 12) to TCK
tH
Hold Time
5.0
1.8
ns
TCK to ACP, BCP (Note 12)
tS
Setup Time, H or L
5.0
8.7
ns
TMS to TCK
tH
Hold Time, H or L
5.0
1.8
ns
TCK to TMS
tS
Setup Time, H or L
5.0
6.4
ns
TDI to TCK
tH
Hold Time, H or L
5.0
3.2
ns
TCK to TDI
tW
Pulse Width TCK
H
5.0
8.2
ns
L11.2
fMAX
Maximum TCK Clock Frequency
5.0
50
MHz
tPU
Wait Time, Power Up to TCK
5.0
100
ns
tDN
Power Down Delay
0.0
100
ms
Symbol
Parameter
Typ
Units
Conditions
CIN
Input Capacitance
5.8
pF
VCC = 0.0V
COUT (Note 13) Output Capacitance
13.8
pF
VCC = 5.0V
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