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参数资料
| 型号： | SCANPSC110FSCX |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 微控制器/微处理器 |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO28 |
| 封装： | 0.300 INCH, MS-013, SOIC-28 |
| 文件页数： | 13/25页 |
| 文件大小： | 269K |
| 代理商： | SCANPSC110FSCX |
www.fairchildsemi.com
20
SCAN
PSC1
10
F
AC Electrical Characteristics
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH). The specification is guaranteed but not tested.
Capacitance
Symbol
Parameter
VCC
(V)
TA = +25°CTA = 40°C to +85°C
Units
Figure
Number
CL = 50 pF
Typ
Guaranteed Minimum
tS
Setup Time
5.0
3.5
8.0
TMSB to TCKB↑
tH
Hold Time
5.0
0.5
4.0
ns
Figure 13
TMSB to TCKB↑
tS
Setup Time
5.0
1.5
6.0
ns
Figure 13
TDIB to TCKB↑
tH
Hold Time
5.0
1.0
4.0
ns
Figure 13
TdIB to TCKB↑
tS
Setup Time
Sn to TCKB↓
5.0
7.5
12.5
ns
(in Update-DR state)
tH
Hold Time
Sn to TCKB↓
5.0
3.0
0.0
ns
(in Update-DR state)
tS
Setup Time
Sn to TCKB↑
5.0
0.0
4.0
ns
(in Capture-DR or Capture-IR state)
tH
Hold Time
Sn to TCKB↑
5.0
1.5
6.0
ns
(in Capture-DR or Capture-IR state)
tS
Setup Time
5.0
1.5
2.0
ns
Figure 13
TDILn to TCKB↑
tH
Hold Time
5.0
2.0
6.0
ns
Figure 13
TDILn to TCKB↑
tS
Setup Time
OE to TCKB↑
5.0
0.0
4.0
ns
(in Capture-DR state)
tH
Hold Time
OE to TCKB↑
5.0
0.0
4.0
ns
(in Capture-DR State)
tW
Clock Pulse Width
5.0
16.0
20.0
24.0
ns
Figure 13
TCKB (H or L)
tWL
Clock Pulse Width
5.0
6.0
10.0
ns
Figure 15
TRST (L)
tREC
Recover Time
5.0
2.0
ns
Figure 15
TCKB↑ from TRST
tOSHL,
Output-to-Output Skew
5.0
1.0
ns
(Note 11)
tOSLH
TCKLn
tOSHL,
Output-to-Output Skew
5.0
2.0
ns
(Note 11)
tOSLH
TMSLn (unparked)
fMAX
Maximum Clock Frequency
5.0
25
MHz
Symbol
Parameter
Typ
Units
Conditions
CIN
Input Pin Capacitance
5.0
pF
VCC is Open
COUT
Output Pin Capacitance
6.5
pF
VCC is Open
CPD
Power Dissipation Capacitance
50
pF
VCC = 5.0V
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