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参数资料
| 型号： | SCF5250LAG100 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 34/56页 |
| 文件大小： | 0K |
| 描述： | IC MPU COLDFIRE 100MHZ 144-LQFP |
| 标准包装： | 60 |
| 系列： | SCF52xx |
| 核心处理器： | Coldfire V2 |
| 芯体尺寸： | 32-位 |
| 速度： | 100MHz |
| 连通性： | EBI/EMI，I²C，IDE，MMC，SPI，UART/USART |
| 外围设备： | DMA，I²S，POR，串行音频，WDT |
| 输入/输出数： | 57 |
| 程序存储器类型： | ROMless |
| RAM 容量： | 128K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.08 V ~ 1.32 V |
| 数据转换器： | A/D 6x12b |
| 振荡器型： | 内部 |
| 工作温度： | -20°C ~ 70°C |
| 封装/外壳： | 144-LQFP |
| 包装： | 托盘 |
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SCF5250 Data Sheet: Technical Data, Rev. 1.3
4
Freescale Semiconductor
1.2.7
System Interface
The SCF5250 provides a glueless interface to 16-bit port size SRAM, ROM, and peripheral devices with
independent programmable control of the assertion and negation of chip-select and write-enable signals.
The SCF5250 also supports bursting ROMs.
1.2.8
External Bus Interface
The bus interface controller transfers information between the ColdFire core or DMA and memory,
peripherals, or other devices on the external bus. The external bus interface provides 23 bits of address bus
space, a 16-bit data bus, Output Enable, and Read/Write signals. This interface implements an extended
synchronous protocol that supports bursting operations.
1.2.9
Serial Audio Interfaces
The SC5250 digital audio interface provides three serial Philips IIS/Sony EIAJ interfaces. One interface
is a 4-pin (1 bit clock, 1 word clock, 1 data in, 1 data out), the other two interfaces are 3-pin (1 bit clock,
1 word clock, 1 data in or out). The serial interfaces have no limit on minimum sampling frequency.
Maximum sampling frequency is determined by maximum frequency on bit clock input. This is 1/3 the
frequency of the internal system clock.
1.2.10
IEC958 Digital Audio Interfaces
The SCF5250 has one digital audio input interface, and one digital audio output interface. The single
output carries the consumer “c” channel.
1.2.11
Audio Bus
The audio interfaces connect to an internal bus that carries all audio data. Each receiver places its received
data on the audio bus and each transmitter takes data from the audio bus for transmission. Each transmitter
has a source select register.
In addition to the audio interfaces, there are six CPU accessible registers connected to the audio bus. Three
of these registers allow data reads from the audio bus and allow selection of the audio source. The other
three register provide a write path to the audio bus and can be selected by transmitters as the audio source.
Through these registers, the CPU has access to the audio samples for processing.
Audio can be routed from a receiver to a transmitter without the data being processed by the core so the
audio bus can be used as a digital audio data switch. The audio bus can also be used for audio format
conversion.
1.2.12
CD-ROM Encoder/Decoder
The SCF5250 is capable of processing CD-ROM sectors in hardware. Processing is compliant with
CD-ROM and CD-ROM XA standards.
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