参数资料
型号: SE98ATL,147
厂商: NXP Semiconductors
文件页数: 13/43页
文件大小: 849K
描述: IC TEMP SENSOR DDR 3.6V 8-HXSON
标准包装: 1
功能: 温度监控系统(传感器)
传感器类型: 内部
感应温度: -40°C ~ 125°C
精确度: ±4°C(最小值)
拓扑: ADC(三角积分型),寄存器库
输出类型: I²C?/SMBus?
输出警报:
输出风扇:
电源电压: 1.7 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
供应商设备封装: 8-WSON
包装: 标准包装
其它名称: 568-4780-6
SE98A_4
?NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04  25 November 2009
13 of 43
NXP Semiconductors
SE98A
DDR memory module temp sensor, 1.7 V to 3.6 V
7.9  SMBus/I
2
C-bus interface
The data registers in this device are selected by the Pointer register. At power-up, the
Pointer register is set to 00, the location for the Capability register. The Pointer register
latches the last location it was set to. Each data register falls into one of three types of
user accessibility:
" Read only
"  Write only
"  Write/Read same address.
A write to this device will always include the address byte and the pointer byte. A write to
any register other than the Pointer register requires two data bytes.
Reading this device can take place either of two ways:
"  If the location latched in the Pointer register is correct (most of the time it is expected 
that the Pointer register will point to one of the Temperature register (as it will be the
data most frequently read), then the read can simply consist of an address byte,
followed by retrieving the two data bytes.
"  If the Pointer register needs to be set, then an address byte, pointer byte, 
repeat START, and another address byte will accomplish a read.
The data byte has the most significant bit first. At the end of a read, this device can accept
either Acknowledge (ACK) or No Acknowledge (NACK) from the Master (No Acknowledge
is typically used as a signal for the slave that the Master has read its last byte). It takes
this device 125 ms to measure the temperature. Refer to the timing diagrams in Figure 8
,
Figure 9
, Figure 10
 and Figure 11
 on how to program the device.
 
A = ACK = Acknowledge bit. W = Write bit = 0. R = Read bit = 1.
Fig 8.    SMBus/I
2
C-bus write to the Pointer register
1    2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SCL
A6
A5
A4
A3
A2
A1
A0
SDA
D7
D6
D5
D4
D3
D2
D1
D0
device address and write
register address
W
A
S
START
ACK
by device
P
STOP
A
ACK
by device
002aab30
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