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参数资料
| 型号： | SI5100-G-BC |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 25/40页 |
| 文件大小： | 0K |
| 描述： | IC TXRX SERIAL/DESERIAL 195CBGA |
| 标准包装： | 126 |
| 系列： | SiPHY™ |
| 类型： | 收发器 |
| 驱动器/接收器数： | 1/1 |
| 规程： | SONET/SDH |
| 电源电压： | 1.71 V ~ 1.89 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 195-BBGA |
| 供应商设备封装： | 195-BGA（15x15） |
| 包装： | 托盘 |
| 其它名称： | 336-1308 SI5100-G-BC-ND |
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Si5100
Rev. 1.5
31
D12
RXMSBSEL
I
LVTTL
Receive Data Bus Bit Order Select.
This determines the order of the received data
bits on the output bus.
When RXMSBSEL is set low, the first bit
received is output on RXDOUT0 and the follow-
ing bits are output in order on RXDOUT1
through RXDOUT15 (RXDOUT1 through
RXDOUT3 if MODE16 = 0). When RXMSBSEL
is set high, the first bit received is output on
RXDOUT15 (RXDOUT3) and the following bits
are output in order on RXDOUT14 (RXDOUT2)
through RXDOUT0.
Note: This input has an internal pulldown.
C11
RXREXT
Receiver External Bias Resistor.
This resistor is used by the receiver circuitry to
establish bias currents within the device. This pin
must be connected to GND through a 3.09 k
1resistor.
C9
RXSQLCH
I
LVTTL
Receiver Data Squelch.
When this input is low the data on RXD-
OUT[15:0] is forced to a zero state. Set
RXSQLCH high for normal operation.
The RXSQLCH input is ignored when operating
in diagnostic loopback mode (DLBK = 0).
Note: This input has an internal pullup.
C4
SLICELVL
I
Slicing Level Adjustment.
Applying an analog voltage to this pin allows
adjustment of the slicing level applied to the
input data eye. Tying this input to VREF sets the
slicing offset to 0.
E12
SLICEMODE
I
LVTTL
Slice Level Adjustment Mode.
The SLICEMODE input is used to select the
mode of operation for slicing level adjustment.
When SLICEMODE = 0, absolute slice mode is
selected. When SLICEMODE = 1, proportional
slice mode is selected.
Note: This input has an internal pulldown.
N2
N1
TXCLK16IN+
TXCLK16IN–
ILVDS
Differential Transmit Data Clock Input.
The rising edge of this input clocks data present
on TXDIN into the device. TXCLK 16IN is also
used as the Si5100 reference clock when the
REFSEL input is set low.
Pin Number(s)
Name
I/O
Signal Level
Description
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相关代理商/技术参数 |
参数描述 |
|---|---|
| Si5100-H-BL | 功能描述:电信线路管理 IC OC-48 STM-16 SONET SDH Trnscvr 1:16 RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray |
| Si5100-H-GL | 功能描述:电信线路管理 IC OC-48 STM-16 SONET SDH Trnscvr 1:16 RoHS:否 制造商:STMicroelectronics 产品:PHY 接口类型:UART 电源电压-最大:18 V 电源电压-最小:8 V 电源电流:30 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:VFQFPN-48 封装:Tray |
| SI-51010-F | 制造商:Bel Fuse 功能描述:- Trays |
| SI-51011-F | 制造商:BEL 制造商全称:Bel Fuse Inc. 功能描述:SI-51011-F |
| SI-51012-F | 制造商:BEL 制造商全称:Bel Fuse Inc. 功能描述:SI-51012-F |
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