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| 型号： | SI5317A-C-GM |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 16/46页 |
| 文件大小： | 0K |
| 描述： | IC CLK JITTER CLEANR PROG 36QFN |
| 应用说明： | SI5315/17 Crystal Selection AppNote |
| 特色产品： | Si5317 Jitter Cleaning Clock |
| 标准包装： | 490 |
| 系列： | DSPLL® |
| 类型： | 抖动消除器 |
| PLL： | 带旁路 |
| 输入： | 时钟，晶体 |
| 输出： | CML，CMOS，LVDS，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:2 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 710MHz |
| 除法器/乘法器： | 无/无 |
| 电源电压： | 1.71 V ~ 3.63 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 供应商设备封装： | 36-QFN（6x6） |
| 包装： | 托盘 |
| 产品目录页面： | 628 (CN2011-ZH PDF) |
| 其它名称： | 336-1923 |
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Si5317
Rev. 1.1
23
3.4. Alarms
Summary alarms are available to indicate the overall status of the input signals. Alarm outputs stay high until all
the alarm conditions for that alarm output are cleared.
3.4.1. Loss-of-Signal
The device has loss-of-signal circuitry that continuously monitors CKIN for missing pulses.
An LOS condition on CKIN causes the LOS alarm to become active. Once a LOS alarm is asserted, it remains
asserted until the input clock is validated over a designated time period. The time to clear LOS after a valid input
clock appears is listed in Table 4, “AC Characteristics”. If another error condition on the same input clock is
detected during the validation time, then the alarm remains asserted and the validation time starts over.
3.4.1.1. LOS Algorithm
The LOS circuitry divides down each input clock to produce an 8 kHz to 2 MHz signal. The LOS circuitry
oversamples this divided down input clock using a 40 MHz clock to search for extended periods of time without
input clock transitions. If the LOS monitor detects twice the normal number of samples without a clock edge, a
LOS alarm is declared. Table 4, “AC Characteristics” gives the minimum and maximum amount of time for the
LOS monitor to trigger.
3.4.1.2. Lock Detect
The PLL lock detection algorithm indicates the lock status on the LOL output pin. The algorithm works by
continuously monitoring the phase of the input clock in relation to the phase of the feedback clock. If the time
between two consecutive phase cycle slips is greater than the retrigger time, the PLL is in lock. The LOL output
has a guaranteed minimum pulse width as shown in Table 4, “AC Characteristics”. The LOL pin is also held in the
active state during an internal PLL calibration. The retrigger time is automatically set based on the PLL closed loop
bandwidth (see Table 10).
3.5. VCO Freeze
The Si5317 device features a VCO freeze mode whereby the DSPLL is locked to a frequency value.
If an LOS condition exists on the selected input clock, the device freezes the VCO. In this mode, the device
provides a stable output frequency until the input clock returns and is validated. When the device enters VCO
freeze, the internal oscillator is initially held to its last frequency value.
3.5.1. Recovery from VCO Freeze
When the input clock signal returns, the device transitions from VCO freeze to the selected input clock.
Table 10. Lock Detect Retrigger Time
PLL Bandwidth Setting (BW)
Retrigger Time (ms)
60–120 Hz
53
120–240 Hz
26.5
240–480 Hz
13.3
480–960 Hz
6.6
960–1920 Hz
3.3
1920–3840 Hz
1.66
3840–7680 Hz
0.833
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SI5317A-C-GMR | 功能描述:时钟合成器/抖动清除器 Pin-Program Jitter Clean Clk 1In/2Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5317B-C-GM | 功能描述:标准时钟振荡器 Pin-Program. Jitter Cleaning Clock RoHS:否 制造商:AVX 产品:Standard Clock Oscillators 封装 / 箱体:7 mm x 5 mm 频率:75 MHz 频率稳定性:50 PPM 电源电压:2.5 V 负载电容: 端接类型:SMD/SMT 最小工作温度:0 C 最大工作温度:+ 70 C 输出格式:LVDS 尺寸: 封装:Reel 系列: |
| SI5317B-C-GMR | 功能描述:时钟合成器/抖动清除器 Pin-Program Jitter Clean Clk 1In/2Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5317C-C-GM | 功能描述:标准时钟振荡器 Pin-Program. Jitter Cleaning Clock RoHS:否 制造商:AVX 产品:Standard Clock Oscillators 封装 / 箱体:7 mm x 5 mm 频率:75 MHz 频率稳定性:50 PPM 电源电压:2.5 V 负载电容: 端接类型:SMD/SMT 最小工作温度:0 C 最大工作温度:+ 70 C 输出格式:LVDS 尺寸: 封装:Reel 系列: |
| SI5317C-C-GMR | 功能描述:时钟合成器/抖动清除器 Pin-Program Jitter Clean Clk 1In/2Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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