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参数资料
| 型号： | SI5317B-C-GMR |
| 厂商： | SILICON LABORATORIES |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 350 MHz, OTHER CLOCK GENERATOR, QCC36 |
| 封装： | 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD, QFN-36 |
| 文件页数： | 1/46页 |
| 文件大小： | 407K |
| 代理商： | SI5317B-C-GMR |
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Rev. 1.1 4/11
Copyright 2011 by Silicon Laboratories
Si5317
P IN-C ONTROLLED 1–711 MH Z J ITTER C LEANING C LOCK
Features
Applications
Description
The Si5317 is a flexible 1:1 jitter cleaning clock for high-performance applications
that require jitter attenuation without clock multiplication. The Si5317 accepts a
single clock input ranging from 1 to 711 MHz and generates two low jitter clock
outputs at the same frequency. The clock frequency range and loop bandwidth are
selectable from a simple look-up table. The Si5317 is based on Silicon
Laboratories' 3rd-generation DSPLL technology, which provides jitter attenuation
on any frequency in a highly integrated PLL solution that eliminates the need for
external VCXO and loop filter components. The DSPLL loop bandwidth is user
selectable, providing jitter performance optimization at the application level.
Functional Block Diagram
Provides jitter attenuation for any clock
frequency
One clock input / two clock outputs
Input/output frequency range:
1–711 MHz
Ultra low jitter: 300 fs
(12 kHz–20 MHz) typical
Simple pin control interface
Selectable loop bandwidth for jitter
attenuation: 60 Hz–8.4 kHz
Meets OC-192 GR-253-CORE jitter
specifications
Selectable output clock signal
format: LVPECL, LVDS, CML or
CMOS
Single supply: 1.8, 2.5, or 3.3 V
Loss of lock and loss of signal
alarms
VCO freeze during LOS/LOL
On-chip voltage regulator with high
PSRR
Small size: 6 x 6 mm, 36-QFN
Wide temperature range: –40 to
+85 C
Data converter clocking
Wireless infrastructure
Networking, SONET/SDH
Switches and routers
Medical instrumentation
Test and measurement
DSPLL
Clock In
Clock Out1
Signal Format [1:0]
Status/Control
Loss of Lock
Loss of Signal
Bandwidth Select [1:0]
XTAL/Clock Rate [1:0]
Frequency Table
High
PSRR
Regulator
Frequency Select [3:0]
Clock Out2
XTAL/Clock
Phase Skew INC/DEC
VDD (1.8, 2.5, 3.3 V)
GND
Ordering Information:
See page 40.
Pin Assignments
1
2
3
29
30
31
32
33
34
35
36
20
21
22
23
24
25
26
27
10 11 12 13 14 15 16 17
4
5
6
7
8
FRQTBL
NC
RST
NC
LOS
GND
VDD
XA
VD
D
RA
T
E
0
NC
DB
L2_BY
RA
T
E
1
CK
IN+
CKI
N
–
NC
BWSEL0
BWSEL1
FRQSEL1
FRQSEL2
FRQSEL3
CK
O
U
T
1
–
SFOU
T1
GND
VD
D
SF
O
U
T
0
CKOU
T
2
-
CKOU
T
2
+
NC
GND
Pad
FRQSEL0
INC
9
18
19
28
XB
LOL
DEC
CKO
U
T
1
+
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相关代理商/技术参数 |
参数描述 |
|---|---|
| Si5317C-C-GM | 功能描述:标准时钟振荡器 Pin-Program. Jitter Cleaning Clock RoHS:否 制造商:AVX 产品:Standard Clock Oscillators 封装 / 箱体:7 mm x 5 mm 频率:75 MHz 频率稳定性:50 PPM 电源电压:2.5 V 负载电容: 端接类型:SMD/SMT 最小工作温度:0 C 最大工作温度:+ 70 C 输出格式:LVDS 尺寸: 封装:Reel 系列: |
| SI5317C-C-GMR | 功能描述:时钟合成器/抖动清除器 Pin-Program Jitter Clean Clk 1In/2Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5317D-C-GM | 功能描述:标准时钟振荡器 Pin-Program. Jitter Cleaning Clock RoHS:否 制造商:AVX 产品:Standard Clock Oscillators 封装 / 箱体:7 mm x 5 mm 频率:75 MHz 频率稳定性:50 PPM 电源电压:2.5 V 负载电容: 端接类型:SMD/SMT 最小工作温度:0 C 最大工作温度:+ 70 C 输出格式:LVDS 尺寸: 封装:Reel 系列: |
| SI5317D-C-GMR | 功能描述:时钟合成器/抖动清除器 Pin-Program Jitter Clean Clk 1In/2Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5317-EVB | 功能描述:时钟和定时器开发工具 Si5317 Eval Board RoHS:否 制造商:Texas Instruments 产品:Evaluation Modules 类型:Clock Conditioners 工具用于评估:LMK04100B 频率:122.8 MHz 工作电源电压:3.3 V |
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