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参数资料
| 型号： | SI5317B-C-GMR |
| 厂商： | SILICON LABORATORIES |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 350 MHz, OTHER CLOCK GENERATOR, QCC36 |
| 封装： | 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD, QFN-36 |
| 文件页数： | 31/46页 |
| 文件大小： | 407K |
| 代理商： | SI5317B-C-GMR |
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Si5317
Rev. 1.1
37
7
6
XB
XA
I
Analog
External Crystal or Reference Clock.
External crystal should be connected to these pins to use
internal oscillator-based reference. Crystal or reference clock
selection is set by the XTAL/CLOCK pin. See “AN591:
Crystal Selection for the Si5315 and Si5317.”
8,31
GND
Supply
Ground.
Must be connected to system ground. Minimize the ground
path impedance for optimal performance of this device.
11
15
RATE0
RATE1
I
3-Level
External Crystal or Reference Clock Rate.
Note:
See Table 13 for settings.
14
DBL2_BY
I
3-Level
Output 2 Disable/Bypass Mode Control.
Controls enable of CKOUT2 divider/output buffer path and
PLL bypass mode.
L = CKOUT2 enabled
M = CKOUT2 disabled
H = Bypass mode with CKOUT2 enabled
This pin has a weak pull-up and weak pull-down and defaults
to M.
Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
Bypass mode is not supported for CMOS clock outputs.
16
17
CKIN+
CKIN–
IMulti
Clock Input.
Differential input clock. This input can also be driven with a
single-ended signal. Input frequency selected from Table 9
18
LOL
O
LVCMOS
PLL Loss of Lock Indicator.
This pin functions as the active high PLL loss of lock indica-
tor.
0 = PLL locked
1 = PLL unlocked
19
DEC
I
LVCMOS
Skew Decrement.
This edge-triggered pin decreases the input to output device
skew. There is no limit on the range of skew adjustment by
this method. Detailed operations and timing characteristics
This pin has a weak pull-down.
20
INC
I
LVCMOS
Skew Increment.
This edge-triggered pin increases the input to output device
skew. There is no limit on the range of skew adjustment by
this method. Detailed operations and timing characteristics
This pin has a weak pull-down.
Table 14. Si5317 Pin Descriptions (Continued)
Pin #
Pin Name
I/O
Signal Level
Description
相关PDF资料 |
PDF描述 |
|---|---|
| SI5350A-AXXXXX-GT | 125 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO10 |
| SI5351C-AGU | 160 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24 |
| SI5351A-AGU | 160 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24 |
| SI5351C-AGM | 160 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC20 |
| SI5351A-AGM | 160 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| Si5317C-C-GM | 功能描述:标准时钟振荡器 Pin-Program. Jitter Cleaning Clock RoHS:否 制造商:AVX 产品:Standard Clock Oscillators 封装 / 箱体:7 mm x 5 mm 频率:75 MHz 频率稳定性:50 PPM 电源电压:2.5 V 负载电容: 端接类型:SMD/SMT 最小工作温度:0 C 最大工作温度:+ 70 C 输出格式:LVDS 尺寸: 封装:Reel 系列: |
| SI5317C-C-GMR | 功能描述:时钟合成器/抖动清除器 Pin-Program Jitter Clean Clk 1In/2Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5317D-C-GM | 功能描述:标准时钟振荡器 Pin-Program. Jitter Cleaning Clock RoHS:否 制造商:AVX 产品:Standard Clock Oscillators 封装 / 箱体:7 mm x 5 mm 频率:75 MHz 频率稳定性:50 PPM 电源电压:2.5 V 负载电容: 端接类型:SMD/SMT 最小工作温度:0 C 最大工作温度:+ 70 C 输出格式:LVDS 尺寸: 封装:Reel 系列: |
| SI5317D-C-GMR | 功能描述:时钟合成器/抖动清除器 Pin-Program Jitter Clean Clk 1In/2Out RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| Si5317-EVB | 功能描述:时钟和定时器开发工具 Si5317 Eval Board RoHS:否 制造商:Texas Instruments 产品:Evaluation Modules 类型:Clock Conditioners 工具用于评估:LMK04100B 频率:122.8 MHz 工作电源电压:3.3 V |
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