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参数资料
| 型号： | SIE804DF-T1-GE3 |
| 厂商： | Vishay Siliconix |
| 文件页数： | 2/10页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH D-S 150V POLARPAK |
| 标准包装： | 3,000 |
| 系列： | TrenchFET® |
| FET 型： | MOSFET N 通道，金属氧化物 |
| FET 特点： | 标准 |
| 漏极至源极电压(Vdss)： | 150V |
| 电流 - 连续漏极(Id) @ 25° C： | 37A |
| 开态Rds（最大）@ Id, Vgs @ 25° C： | 38 毫欧 @ 7.6A，10V |
| Id 时的 Vgs(th)（最大）： | 3V @ 250µA |
| 闸电荷(Qg) @ Vgs： | 105nC @ 10V |
| 输入电容 (Ciss) @ Vds： | 3000pF @ 50V |
| 功率 - 最大： | 125W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-PolarPAK?（SH） |
| 供应商设备封装： | 10-PolarPAK?（SH） |
| 包装： | 带卷 (TR) |
New Product
SiE804DF
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambient a, b
t ≤ 10 s
R thJA
20
24
Maximum Junction-to-Case (Drain Top)
Maximum Junction-to-Case (Source) a, c
Steady State
R thJC (Drain)
R thJC (Source)
0.8
2.2
1
2.7
°C/W
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. Maximum under Steady State conditions is 68 °C/W.
c. Measured at source pin (on the side of the package).
SPECIFICATIONS T J = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
V DS Temperature Coefficient
V GS(th) Temperature Coefficient
Gate-Source Threshold Voltage
V DS
Δ V DS /T J
Δ V GS(th) /T J
V GS(th)
V GS = 0 V, I D = 250 μA
I D = 250 μA
V DS = V GS , I D = 250 μA
150
1
175
-7
3
V
mV/°C
V
Gate-Source Leakage
Zero Gate Voltage Drain Current
On-State Drain Current a
I GSS
I DSS
I D(on)
V DS = 0 V, V GS = ± 20 V
V DS = 150 V, V GS = 0 V
V DS = 150 V, V GS = 0 V, T J = 55 °C
V DS ≥ 5 V, V GS = 10 V
25
± 100
1
10
nA
μA
A
Drain-Source On-State Resistance a
Forward Transconductance a
R DS(on)
g fs
V GS = 10 V, I D = 7.6 A
V GS = 6 V, I D = 7.4 A
V DS = 15 V, I D = 7.6 A
0.031
0.032
40
0.038
0.040
Ω
S
Dynamic b
Input Capacitance
C iss
3000
Output Capacitance
Reverse Transfer Capacitance
C oss
C rss
V DS = 50 V, V GS = 0 V, f = 1 MHz
210
110
pF
Total Gate Charge
Gate-Source Charge
Q g
Q gs
V DS = 50 V, V GS = 10 V, I D = 7.6 A
V DS = 50 V, V GS = 6 V, I D = 7.6 A
70
46
11
105
70
nC
Gate-Drain Charge
Q gd
19
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Switching Time
R g
t d(on)
t r
t d(off)
t f
t d(on)
t r
t d(off)
f = 1 MHz
V DD = 75 V, R L = 12.5 Ω
I D ? 6 A, V GEN = 6 V, R g = 1 Ω
V DD = 75 V, R L = 12.5 Ω
I D ? 6 A, V GEN = 10 V, R g = 1 Ω
2.1
20
15
40
12
15
10
42
4.2
30
25
60
20
25
15
65
Ω
ns
Drain-Source Body Diode Characteristics
t r
10
15
Continuous Source-Drain Diode Current
Pulse Diode Forward Current a
I S
I SM
T C = 25 °C
37
25
A
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
V SD
t rr
Q rr
t a
t b
I S = 6 A
I F = 6 A, dI/dt = 100 A/μs, T J = 25 °C
0.8
70
220
54
16
1.2
110
330
V
ns
nC
ns
Notes:
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
2
Document Number: 69091
S09-0143-Rev. A, 02-Feb-09
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