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参数资料
| 型号： | SL811HS-JCT |
| 厂商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC28 |
| 封装： | LEAD FREE, PLASTIC, LCC-28 |
| 文件页数： | 9/32页 |
| 文件大小： | 854K |
| 代理商： | SL811HS-JCT |
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SL811HS
Document 38-08008 Rev. *D
Page 17 of 32
Current Data Set Register, Address [0Eh]. This register indicates current selected data set for each endpoint.
Control Register 2, Address [0Fh]. Control Register 2 is used to control if the device is configured as a master or a slave. It
can change the polarity of the Data+ and Data- pins to accommodate both full- and low speed operation.
SOF Low Register, Address [15h]. Read
only
register
contains the 7 low order bits of Frame Number in positions: bit
7:1. Bit 0 is undefined. Register is updated when a SOF packet
is received. Do not write to this register.
SOF High Register, Address [16h]. Read
only
register
contains the 4 low order bits of Frame Number in positions: bit
7:4. Bits 3:0 are undefined and should be masked when read
by the user. This register is updated when a SOF packet is
received. The user should not write to this register.
DMA Total Count Low Register, Address [35h]. The DMA
Total Count Low register contains the low order 8 bits of DMA
count. DMA total count is the total number of bytes to be trans-
ferred between a peripheral to the SL811HS. The count may
sometimes require up to 16 bits, therefore the count is repre-
sented in two registers: Total Count Low and Total Count High.
EP3 is only supported with DMA operation.
DMA Total Count High Register, Address [36h]. The DMA
Total Count High register contains the high order 8 bits of DMA
count. When written, this register enables DMA if the DMA
Enable bit is set in Control Register 1. The user should always
write Low Count register first, followed by a write to High Count
register, even if high count is 00h.
Table 33. Current Data Set Register [Address 0Eh]
7
6
5
4
3
2
1
0
Reserved
Endpoint 3
Endpoint 2
Endpoint 1
Endpoint 0
Bit Position
Bit Name
Function
7-4
Reserved
Not applicable.
3
Endpoint 3 Done
Endpoint 3a = 0, Endpoint 3b = 1.
2
Endpoint 2 Done
Endpoint 2a = 0, Endpoint 2b = 1.
1
Endpoint 1 Done
Endpoint 1a = 0, Endpoint 1b = 1.
0
Endpoint 0 Done
Endpoint 0a = 0, Endpoint 0b = 1.
Table 34. Control Register 2 [Address 0Fh]
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SL811HS
Master/Slave
selection
SL811HS
D+/D– Data
Polarity Swap
Reserved
Bit Position
Bit Name
Function
7
SL811HS
Master/Slave
selection
Master = ‘1’
Slave = ‘0’
6
SL811HS D+/D–
Data Polarity Swap
’1’ = change polarity (low speed)
’0’ = no change of polarity (full speed)
5-0
Reserved
NA
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SL811HST | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Embedded USB Host/Slave Controller |
| SL811HST-1.5 | 制造商:Cypress Semiconductor 功能描述:BUS Controller Circuit, 48 Pin, QFP |
| SL811HST-AC | 功能描述:IC USB HOST/SLAVE CTRLR 48LQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器 - 特定应用 系列:- 产品变化通告:Product Discontinuation 26/Aug/2009 标准包装:250 系列:- 应用:网络处理器 核心处理器:4Kc 程序存储器类型:- 控制器系列:- RAM 容量:16K x 8 接口:以太网，UART，USB 输入/输出数:- 电源电压:1.8V, 3.3V 工作温度:- 安装类型:表面贴装 封装/外壳:208-LQFP 包装:带卷 (TR) 供应商设备封装:PG-LQFP-208 其它名称:SP000314382 |
| SL811HST-AXC | 功能描述:USB 接口集成电路 256B HOST COM RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
| SL811HST-AXC | 制造商:Cypress Semiconductor 功能描述:IC USB HOST CONTROLLER 48MHZ 制造商:Cypress Semiconductor 功能描述:IC, USB HOST CONTROLLER, 48MHZ 制造商:Cypress Semiconductor 功能描述:IC, USB HOST CONTROLLER, 48MHZ; No. of I/O's:8; Digital IC Case Style:TQFP; No. of Pins:48; RAM Memory Size:256KB; CPU Speed:48MHz; Peripherals:DMA; Embedded Interface Type:USB; Operating Temperature Min:0C; Operating Temperature |
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