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参数资料
| 型号： | SN65LVDTS33D |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | HIGH-SPEED DIFFERENTIAL RECEIVERS |
| 中文描述： | 高速差分接收器 |
| 文件页数： | 2/23页 |
| 文件大小： | 504K |
| 代理商： | SN65LVDTS33D |
www.ti.com
DESCRIPTION (CONTINUED)
The receivers can withstand ±15 kV human-body model (HBM) and ±600 V machine model (MM) electrostatic
discharges to the receiver input pins with respect to ground without damage. This provides reliability in cabled
and other connections where potentially damaging noise is always a threat.
SN65LVDS33, SN65LVDT33
SN65LVDS34, SN65LVDT34
SLLS490B–MARCH 2001–REVISED NOVEMBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVALIABLE OPTIONS
(1)
PART
NUMBER
(2)
NUMBER OF
RECEIVERS
4
4
4
4
2
2
TERMINATION
RESISTOR
No
No
Yes
Yes
No
Yes
SYMBOLIZATION
SN65LVDS33D
SN65LVDS33PW
SN65LVDTS33D
SN65LVDT33PW
SN65LVDS34D
SN65LVDT34D
LVDS33
LVDS33
LVDT33
LVDT33
LVDS34
LVDS34
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at
www.ti.com
.
Add the suffix R for taped and reeled carrier.
(2)
The receivers also include a (patent pending) failsafe circuit that will provide a high-level output within 600 ns
after loss of the input signal. The most common causes of signal loss are disconnected cables, shorted lines, or
powered-down transmitters. The failsafe circuit prevents noise from being received as valid data under these
fault conditions. This feature may also be used for Wired-Or bus signaling. See
The Active Failsafe Feature of
the SN65LVDS32B
application note.
The intended application and signaling technique of these devices is point-to-point baseband data transmission
over controlled impedance media of approximately 100
. The transmission media may be printed-circuit board
traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation
characteristics of the media and the noise coupling to the environment.
The SN65LVDS33, SN65LVDT33, SN65LVDS34 and SN65LVDT34 are characterized for operation from –40°C
to 85°C.
Function Tables
(1)
SN65LVDS33 and SN65LVDT33
DIFFERENTIAL INPUT
V
ID
= V
A
- V
B
SN65LVDS34 and SN65LVDT34
DIFFERENTIAL INPUT
V
ID
= V
A
– V
B
V
ID
≥
–32 mV
–100 mV < V
ID
≤
–32 mV
V
ID
≤
–100 mV
Open
ENABLES
G
H
X
H
X
H
X
L
H
X
OUTPUT
Y
H
H
L
L
Z
H
H
OUTPUT
Y
H
L
H
G
X
L
X
L
X
L
H
X
L
V
ID
≥
–32 mV
–100 mV < V
ID
≤
–32 mV
V
ID
≤
–100 mV
X
Open
(1)
H = high level, L = low level, X = irrelevant, Z = high impedance (off), = indeterminate
2
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|---|---|
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| SN7400NSRG4 | QUADRUPLE 2-INPUT POSITIVE-NAND GATES |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN65LVEL11D | 功能描述:时钟缓冲器 3.3V PECL 1:2 Fanout Buffer RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SN65LVEL11DGK | 功能描述:时钟缓冲器 3.3V PECL 1:2 Fanout Buffer RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SN65LVEL11DGKR | 功能描述:时钟缓冲器 3.3V PECL 1:2 Fanout Buffer RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SN65LVEL11DR | 功能描述:时钟缓冲器 3.3V PECL 1:2 Fanout Buffer RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SN65LVELT22D | 功能描述:转换 - 电压电平 3.3V Dual LVTTL to Diff LVPECL Trans RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
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