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参数资料
| 型号： | SP6133EB |
| 厂商： | Exar Corporation |
| 文件页数： | 10/20页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR SP6133 |
| 标准包装： | 1 |
| 系列： | * |
APPLICATION INFORMATION
For typical Lp of 2nH and V IN of 2V, di/dt
is 1A/ns. Substituting for di/dt in equation (6)
we get Q GD = 2 nC.
In selecting a package type, the main con-
siderations are cost, power/current handling
capability and space constraints. A larger
package in general offers higher power and
current handling at increased cost. Package
selection can be narrowed down by calculat-
ing the required junction-to-ambient thermal
resistance θ JA :
θ JA = { T J ( MAX ) - T A ( MAX ) } / P ( MAX ) ............. (7)
Where: T J ( MAX ) is the die maximum tem-
perature rating, T A ( MAX ) is maximum ambient
temperature, and P ( MAX ) is maximum power
dissipated in the die.
It is common practice to add a guard-band
of 25?C to the junction temperature rating.
Following this convention, a 150?C rated
MOSFET will be designed to operate at 125?C
(i.e., T J ( MAX ) = 125?C). P ( MAX ) = 0.88W (from
section 4) and T A ( MAX ) = 40?C as specified in
the design example. Substituting in equation
(7) we get θ JA = 96.6 ?C/W.
resistor. During startup, output regulates
when Soft Start (SS) reaches 0.8V (the refer-
ence voltage). PWRGD is enabled when SS
reaches .6V. PWRGD output can be used
as a “Power on Reset”. The simplest way to
adjust delay of the “Power on Reset” signal
with respect to V OUT in regulation is with the
Soft Start Capacitor (C SS ) and is given by:
C SS = (Iss ? Tdelay)/0.8 where Iss is the Soft
Start charge current ( 0μA nominal).
Under Voltage Lock Out (UVLO)
The SP6 33 has two separate UVLO com-
parators to monitor the bias (Vcc) and Input
(V IN ) voltages independently. The Vcc UVLO
is internally set to 4.25V. The V IN UVLO is
programmable through UV IN pin. When
UVIN pin is greater than 2.5V the SP6 33
is permitted to start up pending the removal
of all other faults. A pair of internal resistors
is connected to UVIN as shown in figure 4.
Therefore without external biasing the V IN
start threshold is 9.5V. A small capacitor may
be required between UVIN and GND to filter
out noise. For applications with V IN of 5V or
3.3V, connect UVIN directly to V IN .
SP613X
For the top MOSFET, we now have deter-
mined the following requirements; BV DSS =
30V, R DS ( ON ) = 0.7m Ω , Q GD = 2 nC and θ JA <
96.6?C/W. An SO-8 MOSFET that meets the
requirements is Vishay-Siliconix’s Si4394DY;
BV DSS = 30V, R DS ( ON ) = 9.75m Ω @ V GS = 4.5V,
Q GD = 2. nC and θ JA = 90?C/W.
R4
R5
VIN
UVIN
GND
40K
2.5V ON
2.2V OFF
50K
+
-
The bottom MOSFET has the requirements
of BV DSS = 30V and R DS ( ON ) = 5.4m Ω . Vishay-
Siliconix’s Si4320DY meets the requirements;
BVdss = 30V, R DS ( ON ) = 4m Ω @ Vgs = 4.5V.
Power Good
Power Good (PWRGD) is an open drain
output that is pulled low when V OUT is out-
side regulation. The PWRGD pin can be
connected to VCC with an external 0K Ω
Figure 4- Internal and external bias of UVIN
To program the V IN start threshold, use a
pair of external resistors as shown. If external
resistors are an order of magnitude smaller
than internal resistors, then the V IN start
threshold is given by:
V IN (start) = 2.5 ? (R4+R5)/R5................ (8)
Oct 24-06 Rev L
SP6 33 Synchronous Buck Controller
0
? 2006 Sipex Corporation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SP6133ER1 | 制造商:SIPEX 制造商全称:Sipex Corporation 功能描述:Evaluation Board Manual |
| SP6133ER1/TR | 制造商:SIPEX 制造商全称:Sipex Corporation 功能描述:Synchronous Buck Controller |
| SP6133ER1-L | 功能描述:DC/DC 开关控制器 Synchronous Buck Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| SP6133ER1-L/TR | 功能描述:DC/DC 开关控制器 Synchronous Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| SP6134 | 制造商:SIPEX 制造商全称:Sipex Corporation 功能描述:Dual Supply Synchronous Buck Controller |
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