参数资料
型号: SP6133EB
厂商: Exar Corporation
文件页数: 5/20页
文件大小: 0K
描述: EVAL BOARD FOR SP6133
标准包装: 1
系列: *
PIN
#
PIN
NAME
DESCRIPTION
PIN DESCRIPTION
 
2
3
4
5
6
7
8
9
 0
  
 2
 3
 4
 5
 6
GL
PGND
GND
VFB
COMP
EN
PWRGD
SS
ISN
ISP
SWN
GH
BST
VIN
UVIN
VCC
High current driver output for the low side NFET switch. It is always low if GH is high or during
a fault. Resistor pull down ensures low state at low voltage.
Ground Pin. The power circuitry is referenced to this pin. Return separately from other ground
traces to the (-) terminal of Cout.
Ground pin. The control circuitry of the IC is referenced to this pin.
Feedback Voltage and Short Circuit Detection pin. It is the inverting input of the Error Amplifier 
and serves as the output voltage feedback point for the Buck Converter. The output voltage is
sensed and can be adjusted through an external resistor divider. Whenever VFB drops 0.25V
below the positive reference, a short circuit fault is detected and the IC enters hiccup mode.
Output of the Error Amplifier. It is internally connected to the non-inverting input of the PWM 
comparator.  An optimal filter combination is chosen and connected to this pin and either 
ground or VFB to stabilize the voltage mode loop.
Enable Pin. Pulling this pin below 0.4V will place the IC into sleep mode. This pin is internally
pulled to VCC with a  μA current source.
Power Good Output. This open drain output is pulled low when VOUT is outside of the
regulation. Connect an external resistor to pull high.
Soft Start/Fault Flag. Connect an external capacitor between SS and GND to set the soft start
rate based on the  0μA source current. The SS pin is held low via a  mA (min) current during
all fault conditions.
Negative Input for the Sense Comparator. There should be a 60mV offset between PSENSE
and NSENSE. Offset accuracy + 0%.
Positive Input for the Inductor Current Sense.
Lower supply rail for the GH high-side gate driver. Connect this pin to the switching node at
the junction between the two external power MOSFET transistors.
High current driver output for the high side NFET switch. It is always low if GL is high or during a fault.
High side driver supply pin. Connect BST to the external boost diode and capacitor as shown
in the Application Schematic of page  . High side driver is connected between BST pin and SWN pin.
Supply Input -- supplies power to the internal LDO.
Under Voltage lock-out for VIN voltage. Internally has a resistor divider from VIN to ground.
Can be overridden with external resistors.
Output of the Internal LDO. If VIN is less than 5V then Vcc should be powered from an
external 5V supply.
Note: Die attach paddle is internally connected to GND.
THEORY OF OPERATION
General Overview
The  SP6133  is  a  fixed  frequency,  voltage 
mode, synchronous PWM controller opti-
mized for high efficiency. The part has been 
designed to be especially attractive for single
supply input voltages ranging between 5V
and 24V.
The heart of the SP6 33 is a wide bandwidth
transconductance amplifier designed to ac -
commodate Type II and Type III compensa-
tion schemes. A precision 0.8V reference
present on the positive terminal of the error
amplifier  permits  the  programming  of  the 
output voltage down to 0.8V via the V FB pin.
The  output  of  the  error  amplifier,  COMP, 
compared to a  V peak-to-peak ramp is
responsible for trailing edge PWM control.
This voltage ramp and PWM control logic are
governed by the internal oscillator that ac-
curately sets the PWM frequency to 300 kHz.
Oct 24-06 Rev L
SP6 33 Synchronous Buck Controller
5
? 2006 Sipex Corporation
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