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参数资料
| 型号： | SP7800AJS |
| 元件分类： | ADC |
| 英文描述： | 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| 封装： | 0.300 INCH, PLASTIC, SOIC-24 |
| 文件页数： | 7/13页 |
| 文件大小： | 171K |
| 代理商： | SP7800AJS |
SP7800ADS/02
SP7800A 12-Bit 3
s Sampling A/D Converter
Copyright 2000 Sipex Corporation
3
OBSOLETE
-
HIST
ORICAL
REFERENCE
ONL
Y
SPECIFICATIONS (continued)
T
A = 25°C, Sampling Frequency, f8, = 333kHz, VS = +5V, unless otherwise specified.
PARAMETER
MIN .
TYP.
MAX .
UNITS
CONDITIONS
AC ACCURACY
T
MIN ≤ TA ≤ TMAX
Signal to (Noise + Distortion) Ratio
f
IN = 47kHz
–J
67
70
dB
–K
69
71.0
dB
Signal to Noise Ratio (SNR)
f
IN = 47kHz
–J
68
71
dB
–K
70
71.5
dB
SAMPLING DYNAMICS
Aperture Delay
13
ns
Aperture Jitter
150
ps, rms
Transient Response
Note 5
–J
130
ns
–K
150
ns
Overvoltage Recovery
150
ns
Note 6
DIGITAL INPUTS
T
MIN ≤ TA ≤ TMAX
Logic Levels
V
IL
–0.3
+0.8
V
IH
+2.4
+5.3
V
I
IL
–5
A
I
IH
+5
A
DIGITAL OUTPUTS
Data Format
Parallel; 12-bit or 8-bit/4-bit
Data Coding
Binary; Offset Binary
V
OL
DGND
+0.4
V
I
SINK = 1.6mA
V
OH
+2.4
V
DD
VI
SOURCE = 1.6mA
I
LEAKAGE (High-Z State)
±0.1
±5
A
POWER SUPPLY REQUIREMENTS
Rated Voltage
+4.75
+5.0
+5.25
V
S (VSA and VSD)
Current
18
21
mA
I
S
Power Consumption
90
mW
ENVIRONMENTAL AND MECHANICAL
Specification
–J, –K
0
+70
°C
Storage
–65
+150
°C
Package
–_N
24–pin Narrow DIP
–_S
24–pin SOIC
NOTES
1.
Adjustable to zero with external potentiometer.
2.
LSB means Least Significant Bit. For SP7800A, 1LSB = 2.44mV for
±5V range, 1 LSB = 4.88mV for
±10V range.
3.
Measured at mid-range, between 4.75 < V
S < 5.25 volts.
4.
All specifications in dB are referred to a full-scale input, either
±10V or ±5V.
5.
For full-scale step input, 12-bit accuracy attained in specified time.
6.
Recovers to specified performance in specified time after 2 x F
S input overvoltage.
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相关代理商/技术参数 |
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