![](http://datasheet.mmic.net.cn/140000/SPC560P44L5CEFB_datasheet_5015175/SPC560P44L5CEFB_7.png)
SPC560P50x, SPC560P44x
3.2
Feature list
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Single issue, 32-bit Power Architecture CPU core complex (e200z0) with harvard
architecture:
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Provides variable length encoding (VLE) instruction set encoding for code size
footprint reduction.
–
With the encoding of mixed 16-bit and 32-bit instructions, it is possible to achieve
significant code size footprint reduction over conventional Book E compliant code.
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Up to 512 KB on-chip code flash memory with ECC plus 64 KB on-chip data flash with
ECC
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Up to 40 KB SRAM on-chip with ECC
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INTC - Interrupt controller capable of handling 144 selectable-priority interrupt sources
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Up to two FMPLL modules
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Clock Monitor Unit (CMU) to monitor the integrity of the main crystal oscillator and the
PLL and act as a frequency meter, measuring the frequency of one clock source and
comparing it to a reference clock
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RCOSC - 16 MHz internal RC Oscillator (trimmable)
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PIT - Four Periodic Interrupt Timers with 32-bit counter resolution
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SWT - Windowed software watchodog
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STM - output compare system timer to support AUTOSAR task protection
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XBAR - Crossbar switch architecture for concurrent access to peripherals, flash
memory or RAM from multiple bus masters (AMBA 2.0 v6 AHB)
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eDMA - 16 channel Enhanced Direct Memory Access controller with multiple transfer
request sources using DMA MUX
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SIU-Lite - System Integration Unit Lite; controls the GPIO mode of the pads, the pads
alternate function, and the pads configuration
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BAM - Boot assist module supports downloading operation to internal SRAM via serial
link (FlexCAN or LINFlex or FlexRay)
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FlexPWM - Motor Control PWM module (1 x 8PWM channels)
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eTimer - Two enhanced timer modules (6 channels each) with dedicated motor control
and quadrature decode features integrated
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Safety Port - To support functional safety architectures on the ECU level. Can be
optionally used as a second FlexCAN module with 32 message buffers.
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ADC - Two 10-bit analog-to-digital converters, conversion time <1 s
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CTU - FlexPWM to ADC and eTimer Cross Triggering Unit
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FCU - Fault Collection Unit for functional safety
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DSPI - Four Serial Peripheral Interface modules
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LINFlex - Two Serial Communication Interface modules with LIN support
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FlexCAN - Controller Area Network module with 32 message buffers
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FlexRay - Dual channel FlexRay Controller with 32 message buffers
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GPIO
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144-pin package: 82 general-purpose pins supporting input/output operations plus
26 general-purpose pins supporting input operations (108 in total). Out of these
108 pins, 32 have external interrupt capability.