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参数资料
型号： SPC5634MF0MLQA8
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： FLASH, 80 MHz, MICROCONTROLLER, PQFP144
封装： 20 X 20 MM, 0.50 MM PITCH, 1.40 HEIGHT, ROHS COMPLIANT, LQFP-144
文件页数： 104/122页
文件大小： 1173K
代理商： SPC5634MF0MLQA8
MPC5634M Microcontroller Data Sheet, Rev. 6
Electrical characteristics
Freescale Semiconductor
82
3.11
Temperature sensor electrical characteristics
3.12
eQADC electrical characteristics
6 Self clocked mode frequency is the frequency that the PLL operates at when the reference frequency falls outside
the fLOR window.
7 f
VCO self clock range is 20–150 MHz. fSCM represents fSYS after PLL output divider (ERFD) of 2 through 16 in
enhanced mode.
8 This value is determined by the crystal manufacturer and board design.
9 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
SYS.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal.
Noise injected into the PLL circuitry via VDDPLL and VSSPLL and variation in crystal oscillator frequency increase the
CJITTER percentage for a given interval.
10 Proper PC board layout procedures must be followed to achieve specifications.
11 Values are with frequency modulation disabled. If frequency modulation is enabled, jitter is the sum of C
JITTER and
either fCS or fDS (depending on whether center spread or down spread modulation is enabled).
12 This value is determined by the crystal manufacturer and board design. For 4 MHz to 20 MHz crystals specified for
this PLL, load capacitors should not exceed these limits. For a 20 MHz crystal the maximum load should be 17 pF.
13 Proper PC board layout procedures must be followed to achieve specifications.
14 This parameter is guaranteed by design rather than 100% tested.
15 Vxtal range is preliminary and subject to change pending characterization data.
16 V
IHEXT cannot exceed VRC33 in external reference mode.
17 This specification applies to the period required for the PLL to relock after changing the MFD frequency control bits
in the synthesizer control register (SYNCR).
18 Modulation depth will be attenuated from depth setting when operating at modulation frequencies above 50kHz.
Table 25. Temperature sensor electrical characteristics
Symbol
C
Parameter
Conditions
Value
Unit
min
typical
max
—
CC
C Temperature
monitoring range
–40
—
150
°C
—
CC
C Sensitivity
—
6.3
—
mV/°C
—
CC
C Accuracy
TJ = –40 to 150 °C
–10
—
10
°C
Table 26. eQADC conversion specifications (operating)
Symbol
C
Parameter
Value
Unit
min
max
fADCLK
CC
C
ADC clock (ADCLK) frequency
2
16
MHz
CC
C
Conversion cycles
2+13
128+14
ADCLK
cycles
TSR
CC
C
Stop mode recovery time1
—10
μs
—
CC
C
Resolution2
1.25
—
mV
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