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参数资料
| 型号： | SPC5634MF0MLQA8 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | FLASH, 80 MHz, MICROCONTROLLER, PQFP144 |
| 封装： | 20 X 20 MM, 0.50 MM PITCH, 1.40 HEIGHT, ROHS COMPLIANT, LQFP-144 |
| 文件页数： | 39/122页 |
| 文件大小： | 1173K |
| 代理商： | SPC5634MF0MLQA8 |
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Overview
MPC5634M Microcontroller Data Sheet, Rev. 6
Freescale Semiconductor
23
— eTPU_A and eMIOS input channels
— SIU External Interrupt Request inputs
— Memory-mapped register in the DSPI
Deserialized data is provided as Parallel Output signals and as bits in a memory-mapped register
Transfer initiation conditions:
— Continuous
— Edge sensitive hardware trigger
— Change in data
Pin serialization/deserialization with interleaved SPI frames for control and diagnostics
Continuous serial communications clock
Support for parallel and serial chaining of up to four DSPI blocks
1.3.16
eSCI
The enhanced serial communications interface (eSCI) allows asynchronous serial communications with peripheral devices and
other MCUs. It includes special support to interface to Local Interconnect Network (LIN) slave devices. The eSCI block
provides the following features:
Full-duplex operation
Standard mark/space non-return-to-zero (NRZ) format
13-bit baud rate selection
Programmable 8-bit or 9-bit, data format
Programmable 12-bit or 13-bit data format for Timed Serial Bus (TSB) configuration to support the Microsecond bus
standard
Automatic parity generation
LIN support
— Autonomous transmission of entire frames
— Configurable to support all revisions of the LIN standard
— Automatic parity bit generation
— Double stop bit after bit error
— 10- or 13-bit break support
Separately enabled transmitter and receiver
Programmable transmitter output parity
2 receiver wake up methods:
— Idle line wake-up
— Address mark wake-up
Interrupt-driven operation with flags
Receiver framing error detection
Hardware parity checking
1/16 bit-time noise detection
DMA support for both transmit and receive data
— Global error bit stored with receive data in system RAM to allow post processing of errors
1.3.17
FlexCAN
The MPC5634M MCU contains two controller area network (FlexCAN) blocks. The FlexCAN module is a communication
controller implementing the CAN protocol according to Bosch Specification version 2.0B. The CAN protocol was designed to
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相关代理商/技术参数 |
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|---|---|
| SPC5634MF0MLUA4 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
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| SPC5634MF0MLUA8 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:High performance e200z335 core processor |
| SPC5634MF0MMGA4 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:microcontroller units (MCUs) |
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