参数资料
型号: SSD1815T2R
厂商: Electronic Theatre Controls, Inc.
英文描述: SEMICONDUCTOR TECHNICAL DATA
中文描述: 半导体技术数据
文件页数: 14/35页
文件大小: 856K
代理商: SSD1815T2R
SSD1815
14
REV 1.5
03/2000
S OLOMON
COMMAND TABLE
Bit Pattern
Write Command
(D/C=0, R/W(WR)=0, E(RD)=1)
Comment
0000X
3
X
2
X
1
X
0
Set Lower Column Address
Set the lower nibble of the colume address register using
X
3
X
2
X
1
X
0
as data bits. The initial display line register is reset to
0000b during POR.
0001X
3
X
2
X
1
X
0
Set Higher Column Address
Set the higher nibble of the colume address register using
X
3
X
2
X
1
X
0
as data bits. The initial display line register is reset to
0000b during POR.
00100X
2
X
1
X
0
Set Internal Regulator Resistor Ratio
Internal regulator gain increases as X
2
X
1
X
0
increased from 000b
to 111b. At POR, X
2
X
1
X
0
= 100b.
X
0
=0: turns off the output op-amp buffer (POR)
X
0
=1: turns on the output op-amp buffer
X
1
=0: turns off the internal regulator (POR)
X
1
=1: turns on the internal regulator
X
2
=0: turns off the internal voltage booster (POR)
X
2
=1: turns on the internal voltage booster
Set display RAM display start line register from 0-63 using
X
5
X
4
X
3
X
2
X
1
X
0
.
Display start line register is reset to 000000 during POR.
00101X
2
X
1
X
0
Set Power Control Register
01X
5
X
4
X
3
X
2
X
1
X
0
Set Display Start Line
10000001
* * X
5
X
4
X
3
X
2
X
1
X
0
Set Contrast Control Register
Set Contrast level from 64 contrast steps. Contrast increases (V
L6
decreases) as X
5
X
4
X
3
X
2
X
1
X
0
is increased.
X
5
X
4
X
3
X
2
X
1
X
0
= 100000b (POR)
X
0
=0: column address 00h is mapped to SEG0 (POR)
X
0
=1: column address 83h is mapped to SEG0
Refer to Figure 5 for example.
1010000X
0
Set Segment Re-map
1010001X
0
Set LCD Bias
X
0
=0: 1/9 bias (POR)
X
0
=1: 1/7 bias
For setting bias ratio to 1/4, 1/5, 1/6 or 1/8, see Extended Com-
mand Table.
1010010X
0
Set Entire Display On/Off
X
0
=0: normal display (POR)
X
0
=1: entire display on
X
0
=0: normal display (POR)
X
0
=1: reverse display
X
0
=0: turns off LCD panel (POR)
X
0
=1: turns on LCD panel
Set GDDRAM Page Address (0-8) using X
3
X
2
X
1
X
0
X
3
=0: normal mode (POR)
X
3
=1: remapped mode, COM0 to COM[N-1] becomes COM[N-1]
to COM0 when Multiplex ratio is equal to N. See Figure 5
as an example for N equal to 64.
1010011X
0
Set Normal/Reverse Display
1010111X
0
Set Display On/Off
1011X
3
X
2
X
1
X
0
1100X
3
* * *
Set Page Address
Set COM Output Scan Direction
11100000
Set Read-Modify-Write Mode
Read-modify-write mode will be entered in which the column
address will not be incremented during display data read. At POR,
Read-modify-write mode is turned OFF.
11100010
Software Reset
Initialize the internal status register.
11101110
Set End of Read-Modify-Write Mode
Exit Read-modify-write mode. Column address before entering the
mode will be restored. At POR, Read-modify-write mode is OFF.
1010110X
0
* * * * * * X
1
X
0
Set Indicator On/Off
Indicator Display Mode,
This second byte command is required
ONLY when “Set Indicator On” com-
mand is sent.
X
0
= 0: indicator off (POR, no need of second command byte)
X
0
= 1: indicator on (second command byte required)
X
1
X
0
= 00: indicator off
X
1
X
0
= 01: indicator on and blinking at ~1 second interval
X
1
X
0
= 10: indicator on and blinking at ~1/2 second interval
X
1
X
0
= 11: indicator on constantly
Command for No Operation
11100011
NOP
11110000
Test Mode Reset
Reserved for IC testing. Do NOT use.
1111 * * * *
Set Test Mode
Reserved for IC testing. Do NOT use.
* * * * * * * *
Set Power Save Mode
Standby or sleep mode will be entered with compound commands
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