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参数资料
| 型号： | SST55LC100-45-C-BWE |
| 元件分类： | 存储控制器/管理单元 |
| 英文描述： | FLASH MEMORY DRIVE CONTROLLER, PBGA84 |
| 封装： | ROHS COMPLIANT, MO-210, TFBGA-84 |
| 文件页数： | 80/80页 |
| 文件大小： | 758K |
| 代理商： | SST55LC100-45-C-BWE |
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Advance Information
CompactFlash Card Controller
SST55LC100
2005 Silicon Storage Technology, Inc.
S71298-00-000
10/05
9
TABLE
3-1: PIN ASSIGNMENTS (1 OF 6)
Signal Name
100-lead 84-ball
Pin
Type
I/O
Type1
Name and Functions
Host Side Interface
A10-A0
(Memory Card mode)
61
60
59
58
18
17
16
15
53
22
23
G8
G10
G9
H10
F2
F3
E1
E2
J8
G3
H1
II2D
These address lines along with the REG# signal are used to
select the following: The I/O port address registers within the
CompactFlash card, the memory mapped port address regis-
ters within the CompactFlash card, a byte in the card’s infor-
mation structure and its configuration control and status
registers.
A10-A0
(PC Card I/O mode)
This signal is the same as the PC Card Memory mode signal.
A2-A0
(True IDE mode)
53
22
23
J8
G3
H1
In True IDE mode only A[2:0] are used to select the one of
eight registers in the Task File.
A10-A3
61
60
59
58
18
17
16
15
G8
G10
G9
H10
F2
F3
E1
E2
The remaining address lines should be grounded by the host.
BVD1
(Memory Card mode)
54
J9
O
I2U, O1
This signal is asserted high as BVD1 is not supported.
STSCHG#
(PC Card I/O mode)
This signal is asserted low to alert the host to changes in the
Ready and Write Protect states, while the I/O interface is con-
figured. Its use is controlled by the Card Config and Status reg-
ister.
PDIAG#
(True IDE mode)
In the True IDE mode, this input/output is the Pass Diagnostic
signal in the master/slave handshake protocol.
BVD2
(Memory Card mode)
75
B10
O
I2U, O1
This signal is asserted high as BVD2 is not supported.
SPKR#
(PC Card I/O mode)
This output line is always driven to a high state in I/O mode
since the CompactFlash card controller does not support the
audio function.
DASP#
(True IDE mode)
In the True IDE mode, this input/output is the Disk Active/Slave
Present signal in the master/slave handshake protocol.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SST55LC100-45-C-TQWE | 功能描述:总线收发器 Compact Flash Card Controller RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SST55LC100-45-I-BWE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100-45-I-TQWE | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100M | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:CompactFlash Card Controller |
| SST55LC100M-45-C-BWE | 功能描述:总线收发器 Compact Flash 45MHz 3.3V Commercial RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
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