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ST10F296E
Parallel ports
13.1.4
Alternate port functions
Each port line has one associated programmable alternate input or output function.
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Port 0 and Port 1 may be used for address and data lines when accessing the external
memory. Port 1 also provides input capture lines.
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Port 2, Port 7 and Port 8 are associated with the capture inputs or compare outputs of
the CAPCOM units and/or with the outputs of the PWM0 module, the PWM1 module,
and the ASC1. Port 2 is also used for fast external interrupt inputs and for timer 7 input.
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Port 3 includes the alternate functions of timers, serial interfaces, the optional bus
control signal BHE and the system clock output (CLKOUT).
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Port 4 outputs the additional segment address bit A23 to A16 in systems where more
than 64 Kbytes of memory are accessed directly. In addition, CAN1, CAN2 and I2C
lines are provided.
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Port 5 is used for the analog input channels of the ADC or for the timer control signals.
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Port 6 provides optional bus arbitration signals (BREQ, HLDA, HOLD), chip select
signals, and SSC1 lines.
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XPort 9 is a general purpose input/output port
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XPort 10 is used for additional analog input channels of the ADC
If the alternate output function of a pin is being used, the direction of this pin must be
programmed for output (DPx.y = 1), except for some signals that are used directly after reset
and are configured automatically. Otherwise the pin remains in the high impedance state
and is not affected by the alternate output function. The respective port latch should hold a
1, because its output is ANDed with the alternate output data (except for PWM output
signals).
If the alternate input function of a pin is being used, the direction of the pin must be
programmed for input (DPx.y = 0) if an external device is driving the pin. The input direction
is the default after reset. If no external device is connected to the pin, the direction of the pin
can also be set to output. In this case, the pin reflects the state of the port output latch.
Thus, the alternate input function reads the value stored in the port output latch. This can be
used for testing purposes to allow a software trigger of an alternate input function by writing
to the port output latch.
On most of the port lines, the user software is responsible for setting the proper direction
when using an alternate input or output function of a pin.
This is done by setting or clearing the direction control bit DPx.y of the pin before enabling
the alternate function.
However, there are port lines where the direction of the port line is switched automatically.
For instance, in the multiplexed external bus modes of Port 0, the direction must be switched
several times for an instruction fetch to output the addresses and to input the data.
Obviously, this cannot be done through instructions. In these cases, the direction of the port
line is switched automatically by hardware if the alternate function of such a pin is enabled.
To determine the appropriate level of the port output latches, check how the alternate data
output is combined with the respective port latch output.
There is one basic structure for all port lines with only an alternate input function. However,
port lines with only an alternate output function have different structures due to the way the
direction of the pin is switched and depending on whether the pin is accessible by the user
software or not in the alternate function mode.