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参数资料
| 型号： | ST6367B1/XXX |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| 封装： | SHRINK, PLASTIC, DIP-42 |
| 文件页数： | 41/84页 |
| 文件大小： | 861K |
| 代理商： | ST6367B1/XXX |
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ST6365, ST6375, ST6385 ST6367, ST6377, ST6387
4.7 DEDICATED LATCHES
Two latches are available which may generate in-
terrupts to the ST638x core. The IR latch is set ei-
ther by the falling or rising edge of the signal on pin
PC6(IRIN). If bit 1 (IRPOSEDGE) of the latches
register (E9h) is high, then the latch will be trig-
gered on the rising edge of the signal at
PC6(IRIN). If bit 1 (IRPOSEDGE) is low, then the
latch will be triggered on the falling edge of the sig-
nal at PC6(IRIN). The IR latch can be reset by set-
ting bit 3 (RESIRLAT) of the latches register; the
bit is write only and a high should be written every
time the IR latch needs to be reset. If bit 2 (IRINT-
EN) of the latches register (E9h) is high, then the
output of the IR latch, IRINTN, may generate an in-
terrupt (#0). IRINTN is inverted with respect to the
state of the IR latch. If bit 2 (IRINTEN) is low, then
the output of the IR latch, IRINTN, is forced
high.The state of the IR latch may be read from bit
3 (IRLATCH) of register E4h; if the IR latch is set,
then bit 3 will be high. The PWR latch is set either
by the falling or rising edge of the signal on pin
PC4(PWRIN). If bit 4 (PWREDGE) of the latches
register (E9h) is high, then the latch will be trig-
gered on the rising edge of the signal at
PC4(PWRIN). If bit 4 (PWREDGE) is low, then the
latch will be triggered on the falling edge of the sig-
nal at PC4(PWRIN). The PWR latch can be reset
by setting bit 6 (RESPWRLAT) of the latches reg-
ister; the bit is set only and a high should be written
every time the PWR latch needs to be reset. If bit 5
(PWRINTEN) of the latches register (E9h) is high,
then the output of the PWR latch, PWRINTN, may
generate an interrupt (#4). PWRINTN is inverted
with respect to the state of the PWR latch. If bit 5
(PWRINTEN) is low, then the output of the PWR
latch, PWRINTN, is forced high.
Dedicated Latches Control Register (DLCR)
Address: E9h - Write only
Reset Value: XXh
Caution: This register contains at least one write
only bit. Single bit instructions (SET, RES, INC
and DEC) should not be used.
D7. This bit is not used
RESPWRLAT. Resets the PWR latch; this bit is
write only.
PWRINTEN. This bit enables the PWRINT signal
(#4) from the latch to the ST638x core. Undefined
after reset.
PWREDGE. The bit determines the edge which
will cause the PWRIN latch to be set. If this bit is
high, than the PWRIN latch will be set on the rising
edge of the PWRIN signal. Undefined after reset.
RESIRLAT. Resets the IR latch; this bit is write on-
ly. Undefined after Reset.
IRINTEN. This bit enables the IRINTN signal (#0)
from the latch to the ST638x core. Undefined after
reset.
IRPOSEDGE. The bit determines the edge which
will cause the IR latch to be set. If this bit is high,
than the IR latch will be set on the rising edge of
the IR signal. Undefined after reset.
D0. This bit is not used
70
-
RESP-
WRLAT
PWRINT-
EN
PWRED
GE
RESIR-
LAT
IRINT-
EN
IR-
POSED
GE
-
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相关代理商/技术参数 |
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|---|---|
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| ST6369B1 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microcontroller |
| ST6-36B28 | 功能描述:电源变压器 SPLIT BOBBIN HORZ MOUNT XFMR RoHS:否 制造商:Triad Magnetics 功率额定值:12 VA 初级电压额定值:115 V / 230 V 次级电压额定值:12 V / 24 V 安装风格:SMD/SMT 一次绕组:Dual Primary Winding 二次绕组:Dual Secondary Winding 长度:2.5 in 宽度:2 in 高度:1.062 in |
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