参数资料
型号: ST6367B1/XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42
封装: SHRINK, PLASTIC, DIP-42
文件页数: 50/84页
文件大小: 861K
代理商: ST6367B1/XXX
54/84
ST6365, ST6375, ST6385 ST6367, ST6377, ST6387
ON-SCREEN DISPLAY (Cont’d)
Emulator Remarks
There are a few differences between emulator and
silicon. For noise reasons, the OSD oscillator pins
are not available: the internal oscillator cannot be
disabled and replaced by an external coil. In the
emulator, the Character Bank Select register can
be written also with Global Enable bit set, while
this is not allowed in the device.
Application Notes
1 - The OSD character generator is composed of a
dual port video ram and some circuitry. It needs
two input signals VSYNC and HSYNC to synchro-
nize its dedicated oscillator to the TV picture. It
generates 4 output signals, that can be used from
the TV set to generate the characters on the
screen. For instance, they can be used to feed the
SCART plug, providing an adequate buffer to drive
the low impedance (75
) of the SCART inputs.
2 - The Core sees the OSD as a number of RAM
locations (80) plus a certain number of control reg-
isters (6). These 86 locations are mapped in two
pages of the dynamic data ram address range
(0h.3Fh). In page 5 (load 20h in the register 0E8h),
there are 64 bytes of RAM, the ones of the first 4
rows (16 bytes each row, 15 characters per row
maximum, plus an hidden leading format charac-
ter). In page 6 (load 40h in register 0E8h), the 16
bytes of the fifth row (0..0Fh), and the 6 control
registers (10h..14h,17h).
3 - The video RAM is a dual port ram. That means
that it can be addressed either from the Core or
from the OSD circuitry itself. To reduce the com-
plexity of the circuitry, and thus its cost, some re-
strictions have been introduced in the use of the
OSD.
a. The Core can Only write to any of the 86 loca-
tions (either video RAM or control registers).
b. The Core can Only write to any of the leading
85 locations when the OSD oscillator is OFF.
Only the last location (control register 17h in
page 6) can be addressed at any time. This is
the Global Enable Register, which contains
only the GE bit. If it is set, the OSD is on, if it is
reset the OSD is off.
4 - The timing of the on/off switching of the OSD
oscillator is the following:
a. GE bit is set. The OSD oscillator will start on the
next VSYNC signal.
b. GE bit is reset. The OSD oscillator will be imme-
diately switched off.
5 - To avoid a bad visual impression, it is important
that the GE bit is set before the end of the flyback
time when changing characters. This can be done
inside the VSYNC interrupt routine. The following
diagram can explain better:
Figure 31. OSD Oscillator ON/OFF Timing
Notes:
A - Picture time: 20 mS in PAL/SECAM.
B - VSYNC interrupt, if enabled.
C - Starting of OSD oscillator, if GE = 1
D - Flyback time.
time
VSYNC
B
V
C
V
E
V
A
D
VA00344
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