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参数资料
型号： ST72T141K2MARE
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDSO34
封装： 0.300 INCH, LEAD FREE, PLASTIC, SOP-34
文件页数： 25/131页
文件大小： 3096K
代理商： ST72T141K2MARE
ST72141K2-Auto
120/131
10.6 SUPPLY, RESET AND CLOCK CHARACTERISTICS
10.6.1 Supply Manager
Recommended operating conditions with TA = -40 to +125
oC and voltages referred to V
SS.
10.6.2 RESET Sequence Manager
Recommended operating conditions with TA = -40 to +125
oC and 4.5V < V
DD - VSS < 5.5V.
10.6.3 Clock System
Recommended operating conditions with TA = -40 to +125
oC and voltages referred to V
SS.
Notes:
1. LVD typical data is based on TA=25°C. This data is provided only as design guidelines and are not tested.
2. The VLVDhyst hysteresis is constant.
3. The VDD rise time rate condition is needed to ensure a correct device power-on reset. Not tested in production.
4. Data based on characterization results, not tested in production.
5. Unless otherwise specified, typical data is based on TA=25°C and VDD-VSS=5V. This data is provided only as design
guidelines and is not tested.
6. This data is based on typical a RSmax value. The oscillator selection can be optimized in terms of supply current with
a high quality resonator.
7. RSmax is the equivalent serial resistor of the crystal or ceramic resonator.
8. Data based on design simulations and/or technology characteristics, not tested in production.
LOW VOLTAGE DETECTOR (LVD)
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
VLVDr
Reset release threshold
VDD rise
4.05
4.30
V
VLVDf
Reset generation threshold
VDD fall
3.5
3.75
4.0
VLVDhyst
VLVD Hysteresis
2)
VLVDr - VLVDf
250
mV
VtPOR
VDD rise time rate
3)
0.2
50
V/ms
IDD
LVD Supply Current
HALT mode
100
2004)
A
RESET SEQUENCE MANAGER (RSM)
Symbol
Parameter
Conditions
Min
Typ 5)
Max
Unit
RON
Reset weak pull-up resistance
VIN > VIH
VIN > VSS
5
20
10
80
20
180
k
tDELAYmin
Reset delay for external and
watchdog reset sources
6
30
1/fSFOSC
s
tPULSE
External RESET pin Pulse time
20
s
EXTERNAL CLOCK SOURCE
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOSC2h
OSC2 input pin high level voltage
Square wave signal
with ~50% Duty Cycle
0.7xVDD
VDD
V
VOSC2l
OSC2 input pin low level voltage
VSS
0.3xVDD
CRYSTAL AND CERAMIC RESONATOR OSCILLATORS
Symbol
Parameter
Conditions
Min
Typ 5)
Max
Unit
fOSC
Oscillator Frequency 6)
8
16
MHz
CLi
Load Capacitor
RSmax=100
7)
15 8)
18
21 6)
pF
IDD
Supply Current
700
1100 4)
A
tSTART
Oscillator start-up time
Depends on resonator quality. A typical value is 10ms.
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