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SERIAL COMMUNICATIONS INTERFACE (SCI)
REGISTER DESCRIPTION (Cont’d)
RECEIVER BUFFER REGISTER (RXBR)
R248 - Read only
Reset value: undefined
Bit 7:0 = RD[7:0]:
Received Data.
This register stores the data portion of the re-
ceived word. The data will be transferred from the
Receiver Shift Register into the Receiver Buffer
Register at the end of the word. All receiver inter-
rupt conditions will be updated at the time of trans-
fer. If the selected character format is less than 8
bits, unused most significant bits will forced to “1”.
Note: RXBR and TXBR are two physically differ-
ent registers located at the same address.
TRANSMITTER BUFFER REGISTER (TXBR)
R248 - Write only
Reset value: undefined
Bit 7:0 = TD[7:0]:
Transmit Data.
The ST9 core will load the data for transmission
into this register. The SCI will transfer the data
from the buffer into the Shift Register when availa-
ble. At the transfer, the Transmitter Buffer Register
interrupt is updated. If the selected word format is
less than 8 bits, the unused most significant bits
are not significant.
Note: TXBR and RXBR are two physically differ-
ent registers located at the same address.
INTERRUPT/DMA PRIORITY REGISTER (IDPR)
R249 - Read/Write
Reset value: undefined
Bit 7 = AMEN:
Address Mode Enable.
This bit, together with the AM bit (in the CHCR reg-
ister), decodes the desired addressing/9th data
bit/character match operation.
In Address mode the SCI monitors the input serial
data until its address is detected
Note: Upon reception of address, the RXAP bit (in
the Interrupt Status Register) is set and an inter-
rupt cycle can begin. The address character will
not be transferred into the Receiver Buffer Regis-
ter but all data following the matched SCI address
and preceding the next address word will be trans-
ferred to the Receiver Buffer Register and the
proper interrupts updated. If the address does not
match, all data following this unmatched address
will not be transferred to the Receiver Buffer Reg-
ister.
In any of the cases the RXAP bit must be reset by
software before the next word is transferred into
the Buffer Register.
When AMEN is reset and AM is set, a useful char-
acter search function is performed. This allows the
SCI to generate an interrupt whenever a specific
character is encountered (e.g. Carriage Return).
70
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
70
TD7
TD6
TD5
TD4
TD3
TD2
TD1
TD0
70
AMEN
SB
SA
RXD
TXD
PRL2
PRL1
PRL0
AMEN
AM
0
Address interrupt if 9th data bit = 1
0
1
Address interrupt if character match
10
Address interrupt if character match
and 9th data bit =1
11
Address interrupt if character match
with word immediately following Break
9