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参数资料
型号： ST92186B3BK
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PDIP32
封装： PLASTIC, SDIP-32
文件页数： 90/148页
文件大小： 1664K
代理商： ST92186B3BK
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ST92186B - INTERRUPTS
ARBITRATION MODES (Cont’d)
3.5.2 Nested Mode
The difference between Nested mode and Con-
current mode, lies in the modification of the Cur-
rent Priority Level (CPL) during interrupt process-
ing.
The arbitration phase is basically identical to Con-
current mode, however, once the request is ac-
knowledged, the CPL is saved in the Nested Inter-
rupt Control Register (NICR) by setting the NICR
bit corresponding to the CPL value (i.e. if the CPL
is 3, the bit 3 will be set).
The CPL is then loaded with the priority of the re-
quest just acknowledged; the next arbitration cycle
is thus performed with reference to the priority of
the interrupt service routine currently being exe-
cuted.
Start of Interrupt Routine
The interrupt cycle performs the following steps:
– All maskable interrupt requests are disabled by
clearing CICR.IEN.
– CPL is saved in the special NICR stack to hold
the priority level of the suspended routine.
– Priority level of the acknowledged routine is
stored in CPL, so that the next request priority
will be compared with the one of the routine cur-
rently being serviced.
– The PC low byte is pushed onto system stack.
– The PC high byte is pushed onto system stack.
– If ENCSR is set, CSR is pushed onto system
stack.
– The Flag register is pushed onto system stack.
– The PC is loaded with the 16-bit vector stored in
the Vector Table, pointed to by the IVR.
– If ENCSR is set, CSR is loaded with ISR con-
tents; otherwise ISR is used in place of CSR until
iret
instruction.
Figure 22. Simple Example of a Sequence of Interrupt Requests with:
- Nested mode
- IEN unchanged by the interrupt routines
6
5
4
3
2
1
0
7
MAIN
INT 2
INT0
INT4
INT3
INT2
CPL is set to 7
CPL=2
CPL=7
ei
INTERRUPT 2 HAS PRIORITY LEVEL 2
INTERRUPT 3 HAS PRIORITY LEVEL 3
INTERRUPT 4 HAS PRIORITY LEVEL 4
INTERRUPT 5 HAS PRIORITY LEVEL 5
MAIN
INT 3
CPL=3
INT 6
CPL=6
INT5
INT 0
CPL=0
INT6
INT2
INTERRUPT 6 HAS PRIORITY LEVEL 6
INTERRUPT 0 HAS PRIORITY LEVEL 0
CPL6 > CPL3:
INT6 pending
CPL2 < CPL4:
Serviced next
INT 2
CPL=2
INT 4
CPL=4
INT 5
CPL=5
Priority Level of
Interrupt Request
相关PDF资料
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ST92195B2T1/XXX 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP64
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相关代理商/技术参数
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ST92195 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
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