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参数资料
| 型号： | STR910FAM42X6T |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 96 MHz, RISC MICROCONTROLLER, QFP80 |
| 封装： | LQFP-80 |
| 文件页数： | 25/100页 |
| 文件大小： | 1801K |
| 代理商： | STR910FAM42X6T |
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Functional overview
STR91xFAxxx
3.17
Ethernet MAC interface with DMA
STR91xFA devices in 128-pin and 144-ball packages provide an IEEE-802.3-2002
compliant Media Access Controller (MAC) for Ethernet LAN communications through an
industry standard Medium Independent Interface (MII). The STR91xFA requires an external
Ethernet physical interface device (PHY) to connect to the physical LAN bus (twisted-pair,
fiber, etc.). The PHY is connected to the STR91xFA MII port using as many as 18 signals
(see pins which have signal names MII_* in Table 8).
The MAC corresponds to the OSI Data Link layer and the PHY corresponds to the OSI
Physical layer. The STR91xFA MAC is responsible for:
●
Data encapsulation, including frame assembly before transmission, and frame
parsing/error detection during and after reception.
●
Media access control, including initiation of frame transmission and recover from
transmission failure.
The STR91xFA MAC includes the following features:
●
Supports 10 and 100 Mbps rates
●
Tagged MAC frame support (VLAN support)
●
Half duplex (CSMA/CD) and full duplex operation
●
MAC control sublayer (control frames) support
●
32-bit CRC generation and removal
●
Several address filtering modes for physical and multicast address (multicast and group
addresses)
●
32-bit status code for each transmitted or received frame
●
Internal FIFOs to buffer transmit and receive frames. Transmit FIFO depth is 4 words
(32 bits each), and the receive FIFO is 16 words deep.
A 32-bit burst DMA channel residing on the AHB is dedicated to the Ethernet MAC for high-
speed data transfers, side-stepping the CPU for minimal CPU impact during transfers. This
DMA channel includes the following features:
●
Direct SRAM to MAC transfers of transmit frames with the related status, by descriptor
chain
●
Direct MAC to SRAM transfers of receive frames with the related status, by descriptor
chain
●
Open and Closed descriptor chain management
3.18
USB 2.0 slave device interface with DMA
The STR91xFA provides a USB slave controller that implements both the OSI Physical and
Data Link layers for direct bus connection by an external USB host on pins USBDP and
USBPN. The USB interface detects token packets, handles data transmission and
reception, and processes handshake packets as required by the USB 2.0 standard.
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| STR911FAW32X6T | 32-BIT, FLASH, 96 MHz, RISC MICROCONTROLLER, QFP128 |
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| STR912FAZ42H6T | 32-BIT, FLASH, 96 MHz, RISC MICROCONTROLLER, PBGA144 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| STR910FAM44H6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:ARM966E-S⑩ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA |
| STR910FAM44X6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:ARM966E-S⑩ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA |
| STR910FAW32 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:ARM966E-S⑩ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA |
| STR910FAW32H6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:ARM966E-S⑩ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA |
| STR910FAW32X6 | 功能描述:ARM微控制器 - MCU 256 + 32 64 RAM KB CAN EMI 80 I/O RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 处理器系列:STM32F373xx 数据总线宽度:32 bit 最大时钟频率:72 MHz 程序存储器大小:256 KB 数据 RAM 大小:32 KB 片上 ADC:Yes 工作电源电压:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LQFP-48 安装风格:SMD/SMT |
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