参数资料
型号: SUM110P08-11L-E3
厂商: Vishay Siliconix
文件页数: 2/6页
文件大小: 0K
描述: MOSFET P-CH 80V 110A D2PAK
产品目录绘图: SUB, SUM Series
标准包装: 1
系列: TrenchFET®
FET 型: MOSFET P 通道,金属氧化物
FET 特点: 标准
漏极至源极电压(Vdss): 80V
电流 - 连续漏极(Id) @ 25° C: 110A
开态Rds(最大)@ Id, Vgs @ 25° C: 11.2 毫欧 @ 20A,10V
Id 时的 Vgs(th)(最大): 4V @ 250µA
闸电荷(Qg) @ Vgs: 270nC @ 10V
输入电容 (Ciss) @ Vds: 10850pF @ 40V
功率 - 最大: 375W
安装类型: 表面贴装
封装/外壳: TO-263-3,D²Pak(2 引线+接片),TO-263AB
供应商设备封装: TO-263(D2Pak)
包装: 标准包装
产品目录页面: 1664 (CN2011-ZH PDF)
其它名称: SUM110P08-11L-E3DKR
New Product
SUM110P08-11
Vishay Siliconix
SPECIFICATIONS T J = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Static
Drain-Source Breakdown Voltage
V DS Temperature Coefficient
V GS(th) Temperature Coefficient
V DS
Δ V DS /T J
Δ V GS(th) /T J
V GS = 0 V, I D = - 250 μA
I D = - 250 μA
- 80
- 85
7.0
V
mV/°C
Gate-Source Threshold Voltage
V GS(th)
V DS = V GS , I D = - 250 μA
-2
-4
V
Gate-Source Leakage
Zero Gate Voltage Drain Current
On-State Drain Current a
I GSS
I DSS
I D(on)
V DS = 0 V, V GS = ± 20 V
V DS = - 80 V, V GS = 0 V
V DS = - 80 V, V GS = 0 V, T J = 175 °C
V DS ≥ 10 V, V GS = - 10 V
120
± 100
-1
- 500
nA
μA
A
Drain-Source On-State
Resistance a
r DS(on)
V GS = - 10 V, I D = - 20 A
0.092
0.0111
Ω
Forward Transconductance a
g fs
V DS = - 15 V, I D = - 20 A
80
S
Dynamic b
Input Capacitance
C iss
11500
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
C oss
C rss
Q g
Q gs
Q gd
R g
t d(on)
V DS = - 40 V, V GS = 0 V, f = 1 MHz
V DS = - 40 V, V GS = - 10 V, I D = - 110 A
f = 1 MHz
790
700
185
40
45
3.6
25
280
40
pF
nC
Ω
Rise Time
Turn-Off Delay Time
Fall Time
t r
t d(off)
t f
V DD = - 40 V, R L = 0.36 Ω
I D ? - 110 A, V GEN = - 10 V, R g = 1 Ω
410
145
470
620
220
710
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current a
I S
I SM
T C = 25 °C
- 110
- 120
A
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
V SD
t rr
Q rr
t a
t b
I S = - 20 A
I F = - 20 A, di/dt = 100 A/μs, T J = 25 °C
- 0.8
65
135
43
22
- 1.5
100
205
V
ns
nC
ns
Notes:
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
2
Document Number: 73472
S-70309-Rev. B, 12-Feb-07
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