参数资料
型号: SY87739LHG
厂商: Micrel Inc
文件页数: 11/17页
文件大小: 0K
描述: IC SYNTHESIZER FRACT 3.3V 32TQFP
标准包装: 250
系列: AnyClock®
类型: 分数合成器
PLL:
主要目的: 以太网,光纤通道,SONET/SDH/ATM
输入: PECL
输出: PECL
电路数: 1
比率 - 输入:输出: 1:1
差分 - 输入:输出: 是/是
频率 - 最大: 729MHz
电源电压: 3.15 V ~ 3.45 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-TQFP 裸露焊盘
供应商设备封装: 32-EPAD-TQFP
包装: 托盘
其它名称: 576-1407
Micrel, Inc.
SY87739L
June 2011
3
M9999-061511
hbwhelp@micrel.com or (408) 955-1690
Pin Description (Continued)
Pin Number
Pin Name
Pin Function
7
PROGDI
Program Interface Data In (TTL Input): One data bit is sampled on each rising edge of PRGSK, while
PROGCS is active high.
8
PROGSK
Program Interface Serial Clock (TTL Input): One bit of configuration data is read in each clock cycle.
9, 17
VCC
Supply (Power):
+3.15V to +3.45V.
10
GND
Ground.
14
LOCKED
Lock Output (TTL Output): This indicates proper operation of all the blocks in the clock synthesis
chain. Logic high indicates that SY87739L is generating the expected frequency at the CLKOUT
±
output. Logic low indicates that one or more PLL in the clock synthesis chain has yet to achieve
proper lock.
18
VCCO
Output Supply (Power). Set to same voltage as VCC.
21, 22
CLKOUT
±
Reference Clock Output (Differential PECL Output): This is the synthesized clock generated from
REFCLK
±. It can be used to supply a reference clock to a data recovery device, such as Micrel’s
SY87721L.
25, 32
GNDA
Analog Ground.
26, 27
WRVCF
±
Wrapper Filter (Analog I/O): These pins connect to the output from the wrapper synthesizer charge
pump, as well as the input to the corresponding VCO. A filter network, as described below, converts
the charge pump current to a voltage, and adjusts loop bandwidth.
30, 31
FNVCF
±
Fractional-N Filter (Analog I/O): These pins connect to the output from the fractional-N synthesizer
charge pump, as well as the input to the corresponding Voltage Controlled Oscillator (VCO). A filter
network, as described below, converts the charge pump current to a voltage, and adjusts loop
bandwidth.
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