参数资料
型号: SY87739LHG
厂商: Micrel Inc
文件页数: 4/17页
文件大小: 0K
描述: IC SYNTHESIZER FRACT 3.3V 32TQFP
标准包装: 250
系列: AnyClock®
类型: 分数合成器
PLL:
主要目的: 以太网,光纤通道,SONET/SDH/ATM
输入: PECL
输出: PECL
电路数: 1
比率 - 输入:输出: 1:1
差分 - 输入:输出: 是/是
频率 - 最大: 729MHz
电源电压: 3.15 V ~ 3.45 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-TQFP 裸露焊盘
供应商设备封装: 32-EPAD-TQFP
包装: 托盘
其它名称: 576-1407
Micrel, Inc.
SY87739L
June 2011
12
M9999-061511
hbwhelp@micrel.com or (408) 955-1690
PostDivSel Bit
4
3
2
1
0
Divisor
0
1
0
1
3
0
1
0
2
0
1
3
0
1
0
4
0
1
0
1
5
0
1
0
6
0
1
7
0
1
0
8
0
1
0
1
9
0
1
0
1
0
10
0
1
0
1
11
0
1
0
12
0
1
0
1
13
0
1
0
14
0
1
15
1
0
16
1
0
1
18
1
0
1
0
20
1
0
1
22
1
0
1
0
24
1
0
1
0
1
26
1
0
1
0
28
1
0
1
30
1
0
32
1
0
1
36
1
0
1
0
40
1
0
1
44
1
0
48
1
0
1
52
1
0
56
1
60
Table 5. Setting to Program the Division Ratio of the P
Divider
The divisor value is selected via MicroWire. The 5-bit
PostDivSel register determines the divisor value. It is set
as per Table 5. The SY87739L does not guarantee a
50% duty cycle output. It is designed to provide well
timed rising edges only.
MicroWire Interface
This standard bit-serial interface eases interfacing the
SY87739L to microcontrollers. The SY87739L accepts
one data bit on PROGDI per rising edge on PROGSK.
The data is ignored when PROGCS is inactive low.
When PROGCS is active high, bits are shifted into the
SY87739L. The falling edge of PROGCS then initiates
acquisition of the output frequency defined by the 32-bit
program just loaded into the SY87739L.
This means that, if the user wishes to re-acquire based
on the same program, PROGCS needs to toggle high
then low.
Programming
To program the SY87739L to generate a certain
frequency:
1.
Determine the required values of the programming
parameters, as summarized in Table 6.
2.
Set PROGCS active high.
3.
Shift in each of the 32 bits, as per Table 6. The fields
are loaded in sequence, from the first row to the last
row. For each multi-bit field, the most significant bit
is shifted in first. Shift the bits in through PROGDI,
clocking them with PROGSK edges.
4.
Set PROGCS inactive low.
5.
Wait for LOCKED to assert high.
Field
# Bits
Reference
Preamble
4
Always “000”
qp
5
Section: Gating the P/P-1Divider
qpm1
5
Section: Gating the P/P-1Divider
divsel
4
Table 1
Mfg.
3
Always “000”
PostDivSel
5
Table 5
NdivSel
3
Table 4
MdivSel
3
Table 3
Table 6. Programming Sequence
The SY87739L generates exact frequencies for common
serial data streaming protocols. Summary programming
information appears in the next section. The SY87739L
also enables Micrel’s SY87721L AnyRate CDR to
decode virtually anything within its range of operation, all
from a 27.000MHz reference. Details about how to
program the SY87739L in the general case, including
derivation of programs for both the standard protocols
and the AnyRate application, appear in an applications
note.
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