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参数资料
| 型号： | TC1068MQR |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封装： | QSOP-16 |
| 文件页数： | 10/14页 |
| 文件大小： | 76K |
| 代理商： | TC1068MQR |
5
TC1068
SMBus Thermal Sensor with
External Diode Input
TC1068-1 2/8/99
2001 Microchip Technology Inc. DS21352A
PIN DESCRIPTION
Pin Number
Symbol
Type
Description
2VDD
Power
Power Supply Input
3
D+
Bi-Directional
Current Source and A/D Positive Input
4
D–
Bi-Directional
Current Sink and A/D Negative Input
6,10
ADD[1:0]
Input
Address Select Pins (See Address Decode Table)
7,8
GND
Power
System Ground
11
ALERT#/COMP#
Output
SMBus Interrupt (SMBALERT#) or Comparator Output
12
SDA
Bi-Directional
SMBus Serial Data
14
SCL
Input
SMBus Serial Clock
15
STBY#
Input
Standby Enable
13
INT_SEL
Input
Selects ALERT# or COMP# Output on Pin 11
1, 5, 9, 16
NC
—
Not Connected
PIN DESCRIPTION
SCL
Input. SMBus serial clock. Clocks data into and out of
the TC1068. See System Management Bus Specification,
rev. 1.0, for timing diagrams.
SDA
Bidirectional. Serial data is transferred on the SMBus in
both directions using this pin. See System Management Bus
Specification, rev. 1.0, for timing diagrams.
ADD1, ADD0
Inputs. Sets the 7-bit SMBus address. These pins are
“tri-state,” and the SMBus addresses are specified in the
Address Decode Table.
(NOTE: The tri-state scheme allows up to nine TC1068s
on a single bus. A match between the TC1068’s address and
the address specified in the serial bit stream must be made
to initiate communication. Many SMBus-compatible devices
with other addresses may share the same 2-wire bus (see
System Management Bus Specification, rev. 1.0, for ad-
dress allocations). These pins are only active at power-on
reset, and will latch into the appropriate states.
ALERT#/COMP#*
Output, Open Collector, Active Low. The ALERT# out-
put corresponds to the general SMBALERT# signal and
indicates an interrupt event. The TC1068 will respond to the
standard SMBus Alert Response Address (see SMBus
Specification 1.0) and associated protocol when ALERT# is
asserted. Normally, the ALERT# output will be asserted and
latched when any of the following occurs:
1. INT_TEMP equal to or exceeds INT_HLIM
2. INT_TEMP below INT_LLIM
3. EXT_TEMP equal to or exceeds EXT_HLIM
4. EXT_TEMP below EXT_LLIM
5. External Diode “Open”
The operation of the ALERT# output is controlled by the
MASK1 bit in the CONFIG register. If the MASK1 bit is set to
“1,” no interrupts will be generated on ALERT#. The ALERT#
output is cleared and rearmed by the Alert Response Ad-
dress (ARA). This output may be WIRE-ORed with similar
outputs from other SMBus devices. If the alarm condition
persists after the ARA, the ALERT# output will be immedi-
ately re-asserted.
(NOTE: A pull-up resistor is necessary on ALERT#
since it is an open-drain output. Current sourced from the
pull-up resistor causes power dissipation and may cause
internal heating of the TC1068. To avoid affecting the
accuracy of internal temperature readings, the pull-up resis-
tors should be made as large as possible.)
Normally the COMP# output will be asserted upon the
following events:
1. EXT_TEMP equal to or exceeds EXT_HLIM
2. External Diode “Open”
COMP# will be de-asserted upon the following event:
EXT_TEMP below EXT_HLIM.
The operation of the COMP# output is controlled by the
MASK1 bit in the CONFIG register. If the MASK1 bit is set to
“1,” no interrupts will be generated on COMP#. This output
may be WIRE-ORed with similar outputs from other SMBus
devices. Note: A pull-up resistor is necessary on COMP#
since it is an open-drain output. Current sourced from the
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