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参数资料
| 型号： | TC1068MQR |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封装： | QSOP-16 |
| 文件页数： | 2/14页 |
| 文件大小： | 76K |
| 代理商： | TC1068MQR |
10
SMBus Thermal Sensor with
External Diode Input
TC1068
TC1068-1 2/8/99
2001 Microchip Technology Inc. DS21352A
A/D Conversion Rate Register (CONV_RATE)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Reserved
MSB
X
LSB
Command Byte Description
Command
Code
Function
RIT
00h
Read Internal Temp (INT_TEMP)
RET
01h
Read External Temp (EXT_TEMP)
RS
02h
Read Status Byte (STATUS)
RC
03h
Read Configuration Byte (CONFIG)
RCR
04h
Read Conversion Rate Byte
(CONV_RATE)
RIHL
05h
Read Internal High Limit (INT_HLIM)
RILL
06h
Read Internal Low Limit (INT_LLIM)
REHL
07h
Read External High Limit (EXT_HLIM)
RELL
08h
Read External Low Limit (EXT_LLIM)
WC
09h
Write Configuration Byte (CONFIG)
WCR
0Ah
Write Conversion Rate Byte
(CONV_RATE)
WIHL
0Bh
Write Internal High Limit
(INT_HLIM)
WILL
0Ch
Write Internal Low Limit (INT_LLIM)
WEHL
0Dh
Write External High Limit (EXT_HLIM)
WELL
0Eh
Write External Low Limit (EXT_LLIM)
OSHT
0Fh
One Shot Temp Measurement
RMID
FEh
Read Manufacturer ID (MFR_ID)
RMREV
FFh
Read Manufacturer Revision
Number (MFR_REV)
Configuration Register (Config), 8-Bits, Read/
Write
Configuration Register (Config)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Mask1 Chip Stop
Reserved
Bit
POR State Function
Operation
D[7]
1
Interrupt Mask
1 = mask ALERT#/
(see text)
COMP#
0 = don’t mask
ALERT #/COMP#
D[6]
0
Standby switch
1 = standby,
0 = normal
D[5] – D[0]
0
Reserved –
N/A
Always returns
zero when read.
A/D Conversion Rate Register
(CONV_RATE), 8-Bits, Read/Write
Bit
POR State Function
Operation
D[7:3]
0
Reserved – Always
N/A
returns zero when
read.
D[2:0]
010b
Conversion rate bits.
See below.
A/D Conversion Rate Selection
D2
D1
D0
Conversion Rate
Sa/sec
0
0.0625
0
1
0.125
0
1
0
0.25
011
0.5
100
1.0
101
2.0
110
4.0
111
8.0
NOTE: Conversion rate denotes actual sampling of both internal
and
external sensors.
NOTE: Proper device operation is NOT guaranteed if undefined locations
(10h to FDh) are addressed. In case of erroneous SMBus operation
(RECEIVE_BYTE command issued immediately after WRITE_BYTE com-
mand) the TC1068 will ACKnowledge the address and return 1111 1111b
to signify an error.
Under no condition will it implement an SMBus
“timeout.”
acknowledge that it successfully received the previous
eight bit of data or address.
Data Byte
After a successful ACK of the address byte, the host
must transmit the data byte to be written or clock out the data
to be read. (See the appropriate timing diagrams.) ACK will
be generated after a successful write of a data byte into the
TC1068.
Stop Condition (STOP)
Communications must be terminated by a stop condi-
tion (a Low to High transition of SDA while SCL is High). The
Stop Condition must be communicated by the transmitter to
the TC1068. (See TCN75 data sheet for serial bus timing
diagrams.)
REGISTER SET AND PROGRAMMER’S MODEL
TC1068 Command Set
The TC1068 supports four SMBus command protocols.
These are READ_BYTE, WRITE_BYTE, SEND_BYTE, and
RECEIVE_BYTE. See System Management Bus Specifica-
tion Rev. 1.0 for details.
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