参数资料
型号: TC90A80N
元件分类: 信号分离
英文描述: Y/C SEPARATOR IC, PDIP28
封装: 0.400 INCH, 1.78 MM PITCH, PLASTIC, SDIP-28
文件页数: 4/23页
文件大小: 378K
代理商: TC90A80N
TC90A80N/F
2002-12-04
12
Electrical Characteristics
DC Characteristics
(Ta = 25°C, VDD = 5.00 V, clock input: 3.579545 MHz, 0.5 Vp-p, I
2C BUS: according to test
conditions)
Test Conditions (Remarks)
Characteristics
Pin
No.
Pin
Name Symbol
Min
Typ.
Max
Unit
I2C bus setup
DATA1
DATA2
DATA3
DATA4
I
2C bus setup
0 0
Power supply
3, 12,
13,
20, 23
VDD
IDD
60
85
105
mA
Input signal : Apply NTSC color bar at 1-Vp-p to pin 9.
Test content : Measure the total current of power
supply pins 3, 12, 13, 20, and 23.
1
BIAS
V1
0.9
1.3
1.7
V
I
2C bus setup
0 0
2
VRT
V2
3.02
3.16
3.30
V
4
CIN
V4
2.4
2.5
2.6
V
6
VRB
V6
1.69
1.83
1.97
V
7
YIN
V7
1.69
1.83
1.97
V
9
YCIN
V9
1.72
1.86
2.00
V
19
FSC
V19
2.00
2.45
2.90
V
22
FIL
V22
1.8
3.0
4.2
V
24
VB2
V24
3.0
3.4
3.8
V
25
YOUT
V25
2.37
2.5
2.63
V
27
COUT
V27
3.52
3.7
3.88
V
Pin voltage
28
VB1
V28
1.2
1.6
2.0
V
Input signal : Not apply to pins 4, 7, and 9.
Test content : Measure the DC voltage of those pins.
I2C bus setup
4 0
0 0
0 2
0 0
VIML
VSS
1.0
V
VIMM
1.8
2.8
V
3-level input
voltage
11: KIPVIN
VIMH
3.6
VDD
V
Input signal : Apply NTSC color bar at 1-Vp-p to pin 9.
Test content : Apply DC voltage to pin 11 and measure
the DC voltage change at the following
points.
VIML : Normal operation
VIMM : Stops Y/C separation (drives out composite
video signal to pin 25).
VIMH : Receives PV
(drives out High (VOH) to pin 17).
Operations of VIMM and VIMH are inverted by DATA3 D2
= 1 of the I
2C bus settings.
To support high-speed pulse input, the circuit must have
no hysteresis
I
2C bus setup
0 0
0 2
0 0
VIH
4
VDD
V
2-level input
voltage
8 : TEST
14: CSYNCIN
15: SCL
16: SDA
VIL
VSS
1
V
Test content : Apply DC voltage to pins 8, 14, 15, and
16. Change the DC voltage and check
the point where High/Low level is applied
to those pins by monitoring the DC
change on pins 17 and 18. Measure the
input bottom voltage of the pins 8, 14, 15
and 16.
VIH : Apply reset signal, composite sync signal, I
2C bus
High level.
VIL : Apply reset signal, composite sync signal, I
2C bus
Low level.
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