参数资料
型号: TDA8374A/N3
厂商: NXP SEMICONDUCTORS
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PDIP56
封装: 0.600 INCH, PLASTIC, SOT-400, SDIP-56
文件页数: 25/75页
文件大小: 522K
代理商: TDA8374A/N3
1997 Jul 01
31
Philips Semiconductors
Preliminary specication
I2C-bus controlled economy PAL/NTSC
and NTSC TV-processors
TDA837x family
Gv(in-out)
voltage gain between input and
output
maximum volume
12
dB
α
ct
crosstalk between audio signals
60
AUTOMATIC VOLUME LEVELLING CIRCUIT (TDA8373 AND TDA8374 ONLY; CAPACITOR CONNECTED TO PIN 45)
Gmax
gain
maximum boost; note 16
6
dB
Gmin
gain
minimum boost
14
dB
Iatt
attack charge current
1
mA
Idec
decay discharge current
200
nA
Vctrl(max)
control voltage
maximum boost
1
V
Vctrl(min)
control voltage
minimum boost
5
V
CVBS, Y/C, RGB, CD inputs and luminance input and output
CVBS AND Y/C SWITCH (PINS 11, 13, 17 AND 38)
V11(p-p)
CVBS or Y input voltage
(peak-to-peak value)
note 21
1.0
1.4
V
I17
CVBS input current
4
A
SSCVBS
suppression of non-selected
CVBS input signal
notes 4 and 22
50
dB
V10(p-p)
chrominance input voltage
(burst amplitude) (peak-to-peak
value)
notes 2 and 23
0.3
0.45
V
V38(p-p)
output signal amplitude
(peak-to-peak value)
1.0
V
Zo
output impedance
250
Vsync
top sync level
2.5
V
RGB INPUTS (PINS 23, 24 AND 25)
V23-25(p-p)
input signal amplitude for an
output signal of 2 V
(black-to-white) (peak-to-peak
value)
note 24
0.7
0.8
V
V23-25(p-p)
input signal amplitude before
clipping occurs (peak-to-peak
value)
note 4
1.0
V
Vo
difference between black level
of internal and external signals
at the outputs
20
mV
I23-25
input currents
note 2
0.1
1
A
td
delay difference for the three
channels
note 4
0
ns
FAST BLANKING (PIN 26)
Vi
input voltage
no data insertion
0.3
V
data insertion
0.9
V
V26(max)
maximum input pulse
insertion
3.0
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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